[PATCH] D67192: [X86] Use MOVSX instead of CBW to extend i8 to AX for i8 sdiv.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 5 13:31:59 PDT 2019


craig.topper updated this revision to Diff 218973.
craig.topper added a comment.

Ok I've recovered CBW formation by using MOVSX16rr8 out of isel and fixing it with FixupBWInsts. To avoid complicating the isel code to do something different for udiv/idiv, I've also changed to MOVZX16rr8. I'm also using the 16-bit form for the loads since they might get unfolded later. So FixupBWInsts has to handle all 4 instructions.

Realistically there 3 patches in here if we agree this is the way to go.
-Update FixupBWInsts to handle extends. This by itself will affect the fast-isel test.
-Change udiv to use MOVZX16rr8
-Change sdiv to use MOVSX16rr8


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67192/new/

https://reviews.llvm.org/D67192

Files:
  llvm/lib/Target/X86/X86FixupBWInsts.cpp
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
  llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll
  llvm/test/CodeGen/X86/anyext.ll
  llvm/test/CodeGen/X86/bypass-slow-division-32.ll
  llvm/test/CodeGen/X86/bypass-slow-division-tune.ll
  llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
  llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
  llvm/test/CodeGen/X86/divrem.ll
  llvm/test/CodeGen/X86/divrem8_ext.ll
  llvm/test/CodeGen/X86/fast-isel-divrem.ll
  llvm/test/CodeGen/X86/scalar_widen_div.ll
  llvm/test/CodeGen/X86/urem-power-of-two.ll
  llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D67192.218973.patch
Type: text/x-patch
Size: 63070 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190905/72c66a71/attachment-0001.bin>


More information about the llvm-commits mailing list