[llvm] r371083 - [Hexagon] Fix type in HexagonTargetLowering::ReplaceNodeResults

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Thu Sep  5 09:19:47 2019
New Revision: 371083

URL: http://llvm.org/viewvc/llvm-project?rev=371083&view=rev
Log:
[Hexagon] Fix type in HexagonTargetLowering::ReplaceNodeResults

Added:
    llvm/trunk/test/CodeGen/Hexagon/isel-bitcast-v8i1-i8.ll
Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp?rev=371083&r1=371082&r2=371083&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp Thu Sep  5 09:19:47 2019
@@ -2902,7 +2902,8 @@ HexagonTargetLowering::ReplaceNodeResult
       if (N->getValueType(0) == MVT::i8) {
         SDValue P = getInstr(Hexagon::C2_tfrpr, dl, MVT::i32,
                              N->getOperand(0), DAG);
-        Results.push_back(P);
+        SDValue T = DAG.getAnyExtOrTrunc(P, dl, MVT::i8);
+        Results.push_back(T);
       }
       break;
   }

Added: llvm/trunk/test/CodeGen/Hexagon/isel-bitcast-v8i1-i8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/isel-bitcast-v8i1-i8.ll?rev=371083&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/isel-bitcast-v8i1-i8.ll (added)
+++ llvm/trunk/test/CodeGen/Hexagon/isel-bitcast-v8i1-i8.ll Thu Sep  5 09:19:47 2019
@@ -0,0 +1,18 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+; REQUIRES: asserts
+
+; Check that this doesn't crash.
+; CHECK-LABEL: foo:
+; CHECK: p[[P:[0-3]]] = vcmpb.eq
+; CHECK: r[[R:[0-9]+]] = p[[P]]
+; CHECK: and(r[[R]],#32)
+
+define i32 @foo(<8 x i8> %a0, <8 x i8> %a1) #0 {
+  %v0 = icmp eq <8 x i8> %a0, %a1
+  %v1 = bitcast <8 x i1> %v0 to i8
+  %v2 = and i8 %v1, 32
+  %v3 = zext i8 %v2 to i32
+  ret i32 %v3
+}
+
+attributes #0 = { readnone nounwind }