[PATCH] D66339: [SVE] Fixed-length vector MVT ranges

[David Greene via Phabricator via llvm-commits]

greened added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:899
                    MVT::v2i32}) {
-      for (MVT VT : MVT::integer_vector_valuetypes()) {
+      for (MVT VT : MVT::integer_fixedlen_vector_valuetypes()) {
         setLoadExtAction(ISD::EXTLOAD, VT, Ty, Legal);
----------------
This is confusing to me.  It doesn't do what the comment says (and maybe that comment should have been updated earlier) but it also seems like this could do this:

```
setLoadExtAction(ISD::EXTLOAD, v4i8, v4i16, Legal);
```

That seems wrong.  What am I missing?

I know this patch didn't introduce this.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66339/new/

https://reviews.llvm.org/D66339