[PATCH] D67130: [NVPTX] Add activemask intrinsic.

[Alexey Bataev via Phabricator via llvm-commits]

ABataev created this revision.
ABataev added reviewers: jholewinski, tra, jlebar.
Herald added a subscriber: jdoerfert.
Herald added a project: LLVM.

Since PTX62 vote.ballot cannot be used to get the mask of active
threads, instead activemask.b32 instruction must be used. Required for
Cuda10.

LLVM part of the patches to fix PR43156.


Repository:
  rL LLVM

https://reviews.llvm.org/D67130

Files:
  include/llvm/IR/IntrinsicsNVVM.td
  lib/Target/NVPTX/NVPTX.td
  lib/Target/NVPTX/NVPTXInstrInfo.td
  lib/Target/NVPTX/NVPTXIntrinsics.td
  test/CodeGen/NVPTX/activemask.ll


Index: test/CodeGen/NVPTX/activemask.ll
===================================================================
--- /dev/null
+++ test/CodeGen/NVPTX/activemask.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 -mattr=+ptx62 | FileCheck %s
+
+declare i32 @llvm.nvvm.activemask()
+; CHECK-LABEL: .func{{.*}}activemask
+define i32 @activemask() {
+  ; CHECK: activemask.b32
+  %val = call i32 @llvm.nvvm.activemask()
+  ret i32 %val
+}
Index: lib/Target/NVPTX/NVPTXIntrinsics.td
===================================================================
--- lib/Target/NVPTX/NVPTXIntrinsics.td
+++ lib/Target/NVPTX/NVPTXIntrinsics.td
@@ -274,6 +274,11 @@
 defm VOTE_SYNC_UNI : VOTE_SYNC<Int1Regs, "uni.pred", int_nvvm_vote_uni_sync>;
 defm VOTE_SYNC_BALLOT : VOTE_SYNC<Int32Regs, "ballot.b32", int_nvvm_vote_ballot_sync>;
 
+// activemask.b32
+def ACTIVEMASK : NVPTXInst<(outs Int32Regs:$dest), (ins), "activemask.b32 \t$dest;",
+                             [(set Int32Regs:$dest, (int_nvvm_activemask))]>,
+        Requires<[hasPTX62, hasSM30]>;
+
 multiclass MATCH_ANY_SYNC<NVPTXRegClass regclass, string ptxtype, Intrinsic IntOp,
                           Operand ImmOp> {
   def ii : NVPTXInst<(outs regclass:$dest), (ins i32imm:$mask, ImmOp:$value),
Index: lib/Target/NVPTX/NVPTXInstrInfo.td
===================================================================
--- lib/Target/NVPTX/NVPTXInstrInfo.td
+++ lib/Target/NVPTX/NVPTXInstrInfo.td
@@ -142,6 +142,7 @@
 def hasPTX31 : Predicate<"Subtarget->getPTXVersion() >= 31">;
 def hasPTX60 : Predicate<"Subtarget->getPTXVersion() >= 60">;
 def hasPTX61 : Predicate<"Subtarget->getPTXVersion() >= 61">;
+def hasPTX62 : Predicate<"Subtarget->getPTXVersion() >= 62">;
 def hasPTX63 : Predicate<"Subtarget->getPTXVersion() >= 63">;
 
 def hasSM30 : Predicate<"Subtarget->getSmVersion() >= 30">;
Index: lib/Target/NVPTX/NVPTX.td
===================================================================
--- lib/Target/NVPTX/NVPTX.td
+++ lib/Target/NVPTX/NVPTX.td
@@ -73,6 +73,8 @@
                              "Use PTX version 6.0">;
 def PTX61 : SubtargetFeature<"ptx61", "PTXVersion", "61",
                              "Use PTX version 6.1">;
+def PTX62 : SubtargetFeature<"ptx62", "PTXVersion", "62",
+                             "Use PTX version 6.2">;
 def PTX63 : SubtargetFeature<"ptx63", "PTXVersion", "63",
                              "Use PTX version 6.3">;
 def PTX64 : SubtargetFeature<"ptx64", "PTXVersion", "64",
Index: include/llvm/IR/IntrinsicsNVVM.td
===================================================================
--- include/llvm/IR/IntrinsicsNVVM.td
+++ include/llvm/IR/IntrinsicsNVVM.td
@@ -4090,6 +4090,12 @@
             [IntrInaccessibleMemOnly, IntrConvergent], "llvm.nvvm.vote.ballot.sync">,
   GCCBuiltin<"__nvvm_vote_ballot_sync">;
 
+// activemask
+def int_nvvm_activemask :
+  Intrinsic<[llvm_i32_ty], [],
+            [IntrInaccessibleMemOnly, IntrConvergent], "llvm.nvvm.activemask">,
+  GCCBuiltin<"__nvvm_vote_activemask">;
+
 //
 // MATCH.SYNC
 //


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