[llvm] r370761 - [X86] Merge 2 consecutive HasInt256 branches. NFCI.

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Tue Sep  3 07:39:06 2019
New Revision: 370761

URL: http://llvm.org/viewvc/llvm-project?rev=370761&view=rev
Log:
[X86] Merge 2 consecutive HasInt256 branches. NFCI.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=370761&r1=370760&r2=370761&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Sep  3 07:39:06 2019
@@ -1277,10 +1277,9 @@ X86TargetLowering::X86TargetLowering(con
       setOperationAction(ISD::STORE,              VT, Custom);
     }
 
-    if (HasInt256)
-      setOperationAction(ISD::VSELECT,         MVT::v32i8, Legal);
-
     if (HasInt256) {
+      setOperationAction(ISD::VSELECT, MVT::v32i8, Legal);
+
       // Custom legalize 2x32 to get a little better code.
       setOperationAction(ISD::MGATHER, MVT::v2f32, Custom);
       setOperationAction(ISD::MGATHER, MVT::v2i32, Custom);