[PATCH] D58521: [DAGCombiner] allow truncation of binops after legalization if desirable

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 2 14:50:02 PDT 2019


spatel updated this revision to Diff 218393.
spatel added a comment.

Patch updated:
x86 vector sext is no longer a problem; AMDGPU appears to still show regressions.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58521/new/

https://reviews.llvm.org/D58521

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
  llvm/test/CodeGen/AMDGPU/idot8s.ll
  llvm/test/CodeGen/AMDGPU/idot8u.ll
  llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
  llvm/test/CodeGen/PowerPC/funnel-shift-rot.ll
  llvm/test/CodeGen/SystemZ/scalar-ctlz.ll
  llvm/test/CodeGen/X86/and-encoding.ll
  llvm/test/CodeGen/X86/avx512-mask-op.ll
  llvm/test/CodeGen/X86/bool-math.ll
  llvm/test/CodeGen/X86/clz.ll
  llvm/test/CodeGen/X86/fast-isel-cmp.ll
  llvm/test/CodeGen/X86/funnel-shift.ll
  llvm/test/CodeGen/X86/lzcnt.ll
  llvm/test/CodeGen/X86/masked_store_trunc.ll
  llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
  llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
  llvm/test/CodeGen/X86/movmsk-cmp.ll
  llvm/test/CodeGen/X86/mul-constant-i8.ll
  llvm/test/CodeGen/X86/pr15267.ll
  llvm/test/CodeGen/X86/pr40539.ll
  llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll
  llvm/test/CodeGen/X86/shift-double-x86_64.ll
  llvm/test/CodeGen/X86/shift-double.ll
  llvm/test/CodeGen/X86/vector-compare-all_of.ll
  llvm/test/CodeGen/X86/vector-compare-any_of.ll
  llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D58521.218393.patch
Type: text/x-patch
Size: 127257 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190902/8e87791f/attachment-0001.bin>


More information about the llvm-commits mailing list