[PATCH] D66752: [RISCV] Implement RISCVRegisterInfo::getPointerRegClass
Luís Marques via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 27 14:37:23 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL370113: [RISCV] Implement RISCVRegisterInfo::getPointerRegClass (authored by luismarques, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D66752?vs=217185&id=217499#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D66752/new/
https://reviews.llvm.org/D66752
Files:
llvm/trunk/lib/Target/RISCV/RISCVRegisterInfo.h
Index: llvm/trunk/lib/Target/RISCV/RISCVRegisterInfo.h
===================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVRegisterInfo.h
+++ llvm/trunk/lib/Target/RISCV/RISCVRegisterInfo.h
@@ -52,6 +52,12 @@
bool trackLivenessAfterRegAlloc(const MachineFunction &) const override {
return true;
}
+
+ const TargetRegisterClass *
+ getPointerRegClass(const MachineFunction &MF,
+ unsigned Kind = 0) const override {
+ return &RISCV::GPRRegClass;
+ }
};
}
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