[llvm] r370587 - [DAGCombiner] clean up code in visitShiftByConstant()
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 31 08:08:58 PDT 2019
Author: spatel
Date: Sat Aug 31 08:08:58 2019
New Revision: 370587
URL: http://llvm.org/viewvc/llvm-project?rev=370587&view=rev
Log:
[DAGCombiner] clean up code in visitShiftByConstant()
This is not quite NFC because the SDLoc propagation is changed,
but there are no regression test diffs from that.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=370587&r1=370586&r2=370587&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Aug 31 08:08:58 2019
@@ -489,7 +489,7 @@ namespace {
SDValue reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0,
SDValue N1, SDNodeFlags Flags);
- SDValue visitShiftByConstant(SDNode *N, ConstantSDNode *Amt);
+ SDValue visitShiftByConstant(SDNode *N);
SDValue foldSelectOfConstants(SDNode *N);
SDValue foldVSelectOfConstants(SDNode *N);
@@ -7210,20 +7210,23 @@ SDValue DAGCombiner::visitXOR(SDNode *N)
/// shift (binop X, C0), C1
/// And want to transform into:
/// binop (shift X, C1), (shift C0, C1)
-SDValue DAGCombiner::visitShiftByConstant(SDNode *N, ConstantSDNode *Amt) {
+SDValue DAGCombiner::visitShiftByConstant(SDNode *N) {
+ assert(isConstOrConstSplat(N->getOperand(1)) && "Expected constant operand");
+
// Do not turn a 'not' into a regular xor.
if (isBitwiseNot(N->getOperand(0)))
return SDValue();
// The inner binop must be one-use, since we want to replace it.
- SDNode *LHS = N->getOperand(0).getNode();
- if (!LHS->hasOneUse()) return SDValue();
+ SDValue LHS = N->getOperand(0);
+ if (!LHS.hasOneUse() || !TLI.isDesirableToCommuteWithShift(N, Level))
+ return SDValue();
// We want to pull some binops through shifts, so that we have (and (shift))
// instead of (shift (and)), likewise for add, or, xor, etc. This sort of
// thing happens with address calculations, so it's important to canonicalize
// it.
- switch (LHS->getOpcode()) {
+ switch (LHS.getOpcode()) {
default:
return SDValue();
case ISD::OR:
@@ -7237,14 +7240,14 @@ SDValue DAGCombiner::visitShiftByConstan
}
// We require the RHS of the binop to be a constant and not opaque as well.
- ConstantSDNode *BinOpCst = getAsNonOpaqueConstant(LHS->getOperand(1));
+ ConstantSDNode *BinOpCst = getAsNonOpaqueConstant(LHS.getOperand(1));
if (!BinOpCst)
return SDValue();
// FIXME: disable this unless the input to the binop is a shift by a constant
// or is copy/select. Enable this in other cases when figure out it's exactly
// profitable.
- SDValue BinOpLHSVal = LHS->getOperand(0);
+ SDValue BinOpLHSVal = LHS.getOperand(0);
bool IsShiftByConstant = (BinOpLHSVal.getOpcode() == ISD::SHL ||
BinOpLHSVal.getOpcode() == ISD::SRA ||
BinOpLHSVal.getOpcode() == ISD::SRL) &&
@@ -7258,24 +7261,16 @@ SDValue DAGCombiner::visitShiftByConstan
if (IsCopyOrSelect && N->hasOneUse())
return SDValue();
- EVT VT = N->getValueType(0);
-
- if (!TLI.isDesirableToCommuteWithShift(N, Level))
- return SDValue();
-
// Fold the constants, shifting the binop RHS by the shift amount.
- SDValue NewRHS = DAG.getNode(N->getOpcode(), SDLoc(LHS->getOperand(1)),
- N->getValueType(0),
- LHS->getOperand(1), N->getOperand(1));
+ SDLoc DL(N);
+ EVT VT = N->getValueType(0);
+ SDValue NewRHS = DAG.getNode(N->getOpcode(), DL, VT, LHS.getOperand(1),
+ N->getOperand(1));
assert(isa<ConstantSDNode>(NewRHS) && "Folding was not successful!");
- // Create the new shift.
- SDValue NewShift = DAG.getNode(N->getOpcode(),
- SDLoc(LHS->getOperand(0)),
- VT, LHS->getOperand(0), N->getOperand(1));
-
- // Create the new binop.
- return DAG.getNode(LHS->getOpcode(), SDLoc(N), VT, NewShift, NewRHS);
+ SDValue NewShift = DAG.getNode(N->getOpcode(), DL, VT, LHS.getOperand(0),
+ N->getOperand(1));
+ return DAG.getNode(LHS.getOpcode(), DL, VT, NewShift, NewRHS);
}
SDValue DAGCombiner::distributeTruncateThroughAnd(SDNode *N) {
@@ -7603,7 +7598,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N)
}
if (N1C && !N1C->isOpaque())
- if (SDValue NewSHL = visitShiftByConstant(N, N1C))
+ if (SDValue NewSHL = visitShiftByConstant(N))
return NewSHL;
return SDValue();
@@ -7794,7 +7789,7 @@ SDValue DAGCombiner::visitSRA(SDNode *N)
return DAG.getNode(ISD::SRL, SDLoc(N), VT, N0, N1);
if (N1C && !N1C->isOpaque())
- if (SDValue NewSRA = visitShiftByConstant(N, N1C))
+ if (SDValue NewSRA = visitShiftByConstant(N))
return NewSRA;
return SDValue();
@@ -7975,7 +7970,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N)
return SDValue(N, 0);
if (N1C && !N1C->isOpaque())
- if (SDValue NewSRL = visitShiftByConstant(N, N1C))
+ if (SDValue NewSRL = visitShiftByConstant(N))
return NewSRL;
// Attempt to convert a srl of a load into a narrower zero-extending load.
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