[PATCH] D66882: [DAGCombiner] Match (add X, X) as (shl X, 1) when detecting rotate.
Amaury SECHET via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 30 14:02:25 PDT 2019
deadalnix marked 2 inline comments as done.
deadalnix added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:6120
// result matches up with the existing shift's LHS op.
if (IsMulOrDiv) {
// Op to extract from is a mul or udiv by a constant.
----------------
lebedev.ri wrote:
> deadalnix wrote:
> > lebedev.ri wrote:
> > > Hm, this function already handles non-shifts.
> > > Can it simply be extended with a similar block?
> > The whole function is about reconstructing shifts from something else.
> duh?
> That is not what i was talking about.
> This code already matches non-shifts - multiplications, divisions,
> I'm wondering if it can be extended to also handle add's, without adding that explicit `return DAG.getNode(ISD::SHL, `
But this code DOES build a shift node.
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:6145
SDValue NewShiftNode = DAG.getConstant(NeededShiftAmt, DL, ShiftVT);
return DAG.getNode(Opcode, DL, ResVT, OppShiftLHS, NewShiftNode);
}
----------------
This is where the shift node is built.
Repository:
rL LLVM
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https://reviews.llvm.org/D66882/new/
https://reviews.llvm.org/D66882
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