[llvm] r368164 - [AArch64][WinCFI] Do not pair callee-save instructions in LoadStoreOptimizer
Hans Wennborg via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 30 00:25:54 PDT 2019
Merged to release_90 in r370438 due to PR43167.
On Wed, Aug 7, 2019 at 2:40 PM Sander de Smalen via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>
> Author: s.desmalen
> Date: Wed Aug 7 05:41:38 2019
> New Revision: 368164
>
> URL: http://llvm.org/viewvc/llvm-project?rev=368164&view=rev
> Log:
> [AArch64][WinCFI] Do not pair callee-save instructions in LoadStoreOptimizer
>
> Prevent the LoadStoreOptimizer from pairing any load/store instructions with
> instructions from the prologue/epilogue if the CFI information has encoded the
> operations as separate instructions. This would otherwise lead to a mismatch
> of the actual prologue size from the size as recorded in the Windows CFI.
>
> Reviewers: efriedma, mstorsjo, ssijaric
>
> Reviewed By: efriedma
>
> Differential Revision: https://reviews.llvm.org/D65817
>
> Modified:
> llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
> llvm/trunk/test/CodeGen/AArch64/wineh1.mir
> llvm/trunk/test/CodeGen/AArch64/wineh2.mir
> llvm/trunk/test/DebugInfo/COFF/AArch64/arm64-register-variables.ll
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=368164&r1=368163&r2=368164&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp Wed Aug 7 05:41:38 2019
> @@ -32,6 +32,7 @@
> #include "llvm/CodeGen/TargetSubtargetInfo.h"
> #include "llvm/IR/DebugLoc.h"
> #include "llvm/IR/GlobalValue.h"
> +#include "llvm/MC/MCAsmInfo.h"
> #include "llvm/MC/MCInst.h"
> #include "llvm/MC/MCInstrDesc.h"
> #include "llvm/Support/Casting.h"
> @@ -1928,6 +1929,17 @@ bool AArch64InstrInfo::isCandidateToMerg
> if (isLdStPairSuppressed(MI))
> return false;
>
> + // Do not pair any callee-save store/reload instructions in the
> + // prologue/epilogue if the CFI information encoded the operations as separate
> + // instructions, as that will cause the size of the actual prologue to mismatch
> + // with the prologue size recorded in the Windows CFI.
> + const MCAsmInfo *MAI = MI.getMF()->getTarget().getMCAsmInfo();
> + bool NeedsWinCFI = MAI->usesWindowsCFI() &&
> + MI.getMF()->getFunction().needsUnwindTableEntry();
> + if (NeedsWinCFI && (MI.getFlag(MachineInstr::FrameSetup) ||
> + MI.getFlag(MachineInstr::FrameDestroy)))
> + return false;
> +
> // On some CPUs quad load/store pairs are slower than two single load/stores.
> if (Subtarget.isPaired128Slow()) {
> switch (MI.getOpcode()) {
>
> Modified: llvm/trunk/test/CodeGen/AArch64/wineh1.mir
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/wineh1.mir?rev=368164&r1=368163&r2=368164&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/wineh1.mir (original)
> +++ llvm/trunk/test/CodeGen/AArch64/wineh1.mir Wed Aug 7 05:41:38 2019
> @@ -1,5 +1,7 @@
> # RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog -filetype=obj \
> # RUN: | llvm-readobj --unwind | FileCheck %s
> +# RUN: llc -o - %s -mtriple=aarch64-windows -run-pass=aarch64-ldst-opt \
> +# RUN: | FileCheck %s --check-prefix=CHECK-LDSTOPT
> # This test case checks the basic validity of the .xdata section. It's
> # documented at:
> # https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling
> @@ -7,7 +9,7 @@
> # We expect to see the following in the .xdata section:
>
> # CHECK: ExceptionData {
> -# CHECK-NEXT: FunctionLength: 92
> +# CHECK-NEXT: FunctionLength: 96
> # CHECK-NEXT: Version: 0
> # CHECK-NEXT: ExceptionData: No
> # CHECK-NEXT: EpiloguePacked: No
> @@ -24,7 +26,7 @@
> # CHECK-NEXT: ]
> # CHECK-NEXT: EpilogueScopes [
> # CHECK-NEXT: EpilogueScope {
> -# CHECK-NEXT: StartOffset: 15
> +# CHECK-NEXT: StartOffset: 16
> # CHECK-NEXT: EpilogueStartIndex: 13
> # CHECK-NEXT: Opcodes [
> # CHECK-NEXT: 0xc808 ; ldp x19, x20, [sp, #64]
> @@ -39,6 +41,12 @@
> # CHECK-NEXT: }
> # CHECK-NEXT: ]
> # CHECK-NEXT: }
> +
> +# Check that the load-store optimizer does not merge the two
> +# callee-saved stores in the prologue.
> +# CHECK-LDSTOPT: name: test
> +# CHECK-LDSTOPT: frame-setup STRXui killed $x21, $sp, 6
> +# CHECK-LDSTOPT: frame-setup STRXui killed $x22, $sp, 7
> ...
> ---
> name: test
>
> Modified: llvm/trunk/test/CodeGen/AArch64/wineh2.mir
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/wineh2.mir?rev=368164&r1=368163&r2=368164&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/wineh2.mir (original)
> +++ llvm/trunk/test/CodeGen/AArch64/wineh2.mir Wed Aug 7 05:41:38 2019
> @@ -3,7 +3,7 @@
> # Test that the pre/post increment save of a flating point register is correct.
>
> # CHECK: ExceptionData {
> -# CHECK-NEXT: FunctionLength: 136
> +# CHECK-NEXT: FunctionLength: 144
> # CHECK-NEXT: Version: 0
> # CHECK-NEXT: ExceptionData: No
> # CHECK-NEXT: EpiloguePacked: No
> @@ -23,7 +23,7 @@
> # CHECK-NEXT: ]
> # CHECK-NEXT: EpilogueScopes [
> # CHECK-NEXT: EpilogueScope {
> -# CHECK-NEXT: StartOffset: 25
> +# CHECK-NEXT: StartOffset: 26
> # CHECK-NEXT: EpilogueStartIndex: 19
> # CHECK-NEXT: Opcodes [
> # CHECK-NEXT: 0xc80e ; ldp x19, x20, [sp, #112]
>
> Modified: llvm/trunk/test/DebugInfo/COFF/AArch64/arm64-register-variables.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/AArch64/arm64-register-variables.ll?rev=368164&r1=368163&r2=368164&view=diff
> ==============================================================================
> --- llvm/trunk/test/DebugInfo/COFF/AArch64/arm64-register-variables.ll (original)
> +++ llvm/trunk/test/DebugInfo/COFF/AArch64/arm64-register-variables.ll Wed Aug 7 05:41:38 2019
> @@ -28,9 +28,9 @@
> ; OBJ: OffsetInParent: 0
> ; OBJ: BasePointerOffset: 12
> ; OBJ: LocalVariableAddrRange {
> -; OBJ: OffsetStart: .text+0x10
> +; OBJ: OffsetStart: .text+0x14
> ; OBJ: ISectStart: 0x0
> -; OBJ: Range: 0x2C
> +; OBJ: Range: 0x30
> ; OBJ: }
> ; OBJ: }
>
>
>
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