[PATCH] D66785: [x86] Adding support for some missing intrinsics: _mm512_cvtsi512_si32

Bing Yu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 28 22:02:16 PDT 2019


yubing updated this revision to Diff 217774.
yubing marked an inline comment as done.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66785/new/

https://reviews.llvm.org/D66785

Files:
  clang/lib/Headers/avx512fintrin.h
  clang/test/CodeGen/avx512f-builtins.c


Index: clang/test/CodeGen/avx512f-builtins.c
===================================================================
--- clang/test/CodeGen/avx512f-builtins.c
+++ clang/test/CodeGen/avx512f-builtins.c
@@ -4762,6 +4762,12 @@
   return _mm_cvtsd_u32(__A); 
 }
 
+int test_mm512_cvtsi512_si32(__m512i a) {
+  // CHECK-LABEL: test_mm512_cvtsi512_si32
+  // CHECK: %{{.*}} = extractelement <16 x i32> %{{.*}}, i32 0
+  return _mm512_cvtsi512_si32(a);
+}
+
 #ifdef __x86_64__
 unsigned long long test_mm_cvt_roundsd_u64(__m128d __A) {
   // CHECK-LABEL: @test_mm_cvt_roundsd_u64
Index: clang/lib/Headers/avx512fintrin.h
===================================================================
--- clang/lib/Headers/avx512fintrin.h
+++ clang/lib/Headers/avx512fintrin.h
@@ -9659,6 +9659,23 @@
 }
 #undef _mm512_mask_reduce_operator
 
+/// Moves the least significant 32 bits of a vector of [16 x i32] to a
+///    32-bit signed integer value.
+///
+/// \headerfile <x86intrin.h>
+///
+/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
+///
+/// \param __A
+///    A vector of [16 x i32]. The least significant 32 bits are moved to the
+///    destination.
+/// \returns A 32-bit signed integer containing the moved value.
+static __inline__ int __DEFAULT_FN_ATTRS512
+_mm512_cvtsi512_si32(__m512i __A) {
+  __v16si __b = (__v16si)__A;
+  return __b[0];
+}
+
 #undef __DEFAULT_FN_ATTRS512
 #undef __DEFAULT_FN_ATTRS128
 #undef __DEFAULT_FN_ATTRS


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