[lld] r370180 - [ELF][AMDGPU][SPARC] Allow PT_LOAD to have overlapping p_offset ranges on EM_AMDGPU and EM_SPARCV9
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 28 02:45:07 PDT 2019
Author: maskray
Date: Wed Aug 28 02:45:06 2019
New Revision: 370180
URL: http://llvm.org/viewvc/llvm-project?rev=370180&view=rev
Log:
[ELF][AMDGPU][SPARC] Allow PT_LOAD to have overlapping p_offset ranges on EM_AMDGPU and EM_SPARCV9
Modified:
lld/trunk/ELF/Writer.cpp
lld/trunk/test/ELF/amdgpu-relocs.s
lld/trunk/test/ELF/basic-sparcv9.s
Modified: lld/trunk/ELF/Writer.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Writer.cpp?rev=370180&r1=370179&r2=370180&view=diff
==============================================================================
--- lld/trunk/ELF/Writer.cpp (original)
+++ lld/trunk/ELF/Writer.cpp Wed Aug 28 02:45:06 2019
@@ -2224,10 +2224,9 @@ template <class ELFT> void Writer<ELFT>:
// and non-executable segments.
//
// TODO Enable this technique on all targets.
- bool enable = config->emachine == EM_386 ||
- config->emachine == EM_AARCH64 ||
- config->emachine == EM_ARM || config->emachine == EM_PPC ||
- config->emachine == EM_PPC64;
+ bool enable =
+ config->emachine != EM_HEXAGON && config->emachine != EM_MIPS &&
+ config->emachine != EM_RISCV && config->emachine != EM_X86_64;
if (!enable || (config->zSeparateCode && prev &&
(prev->p_flags & PF_X) != (p->p_flags & PF_X)))
Modified: lld/trunk/test/ELF/amdgpu-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/amdgpu-relocs.s?rev=370180&r1=370179&r2=370180&view=diff
==============================================================================
--- lld/trunk/test/ELF/amdgpu-relocs.s (original)
+++ lld/trunk/test/ELF/amdgpu-relocs.s Wed Aug 28 02:45:06 2019
@@ -94,7 +94,7 @@ foo:
# linker.
# CHECK: Relocations [
# CHECK: .rela.dyn {
-# CHECK-NEXT: R_AMDGPU_RELATIVE64 - 0x3008
+# CHECK-NEXT: R_AMDGPU_RELATIVE64 - 0x3928
# CHECK-NEXT: R_AMDGPU_ABS64 common_var0 0x0
# CHECK-NEXT: R_AMDGPU_ABS64 common_var1 0x0
# CHECK-NEXT: R_AMDGPU_ABS64 common_var2 0x0
@@ -114,16 +114,16 @@ foo:
# CHECK-NEXT: }
# CHECK-NEXT: ]
-# NM: 0000000000003010 B common_var0
-# NM: 0000000000003410 B common_var1
-# NM: 0000000000003810 B common_var2
-# NM: 0000000000003008 d temp2
+# NM: 0000000000003930 B common_var0
+# NM: 0000000000003d30 B common_var1
+# NM: 0000000000004130 B common_var2
+# NM: 0000000000003928 d temp2
-# temp2 - foo = 0x3008-0x768 = 0x28a0
+# temp2 - foo = 0x3928-0x768 = 0x31c0
# HEX: section '.rodata':
-# HEX-NEXT: 0x00000768 a0280000 00000000
+# HEX-NEXT: 0x00000768 c0310000 00000000
# common_var2+4, common_var1+8, and common_var0+12.
# HEX: section 'nonalloc':
-# HEX-NEXT: 0x00000000 00000000 14380000 00000000 18340000
-# HEX-NEXT: 0x00000010 00000000 1c300000
+# HEX-NEXT: 0x00000000 00000000 34410000 00000000 383d0000
+# HEX-NEXT: 0x00000010 00000000 3c390000
Modified: lld/trunk/test/ELF/basic-sparcv9.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/basic-sparcv9.s?rev=370180&r1=370179&r2=370180&view=diff
==============================================================================
--- lld/trunk/test/ELF/basic-sparcv9.s (original)
+++ lld/trunk/test/ELF/basic-sparcv9.s Wed Aug 28 02:45:06 2019
@@ -26,7 +26,7 @@ _start:
# CHECK-NEXT: Version: 1
# CHECK-NEXT: Entry: [[ENTRY:0x[0-9A-F]+]]
# CHECK-NEXT: ProgramHeaderOffset: 0x40
-# CHECK-NEXT: SectionHeaderOffset: 0x100080
+# CHECK-NEXT: SectionHeaderOffset: 0x1A0
# CHECK-NEXT: Flags [ (0x0)
# CHECK-NEXT: ]
# CHECK-NEXT: HeaderSize: 64
@@ -59,8 +59,8 @@ _start:
# CHECK-NEXT: SHF_ALLOC (0x2)
# CHECK-NEXT: SHF_EXECINSTR (0x4)
# CHECK-NEXT: ]
-# CHECK-NEXT: Address: 0x200000
-# CHECK-NEXT: Offset: 0x100000
+# CHECK-NEXT: Address: 0x200120
+# CHECK-NEXT: Offset: 0x120
# CHECK-NEXT: Size: 12
# CHECK-NEXT: Link: 0
# CHECK-NEXT: Info: 0
@@ -76,7 +76,7 @@ _start:
# CHECK-NEXT: SHF_STRINGS (0x20)
# CHECK-NEXT: ]
# CHECK-NEXT: Address: 0x0
-# CHECK-NEXT: Offset: 0x10000C
+# CHECK-NEXT: Offset: 0x12C
# CHECK-NEXT: Size: 8
# CHECK-NEXT: Link: 0
# CHECK-NEXT: Info: 0
@@ -90,7 +90,7 @@ _start:
# CHECK-NEXT: Flags [ (0x0)
# CHECK-NEXT: ]
# CHECK-NEXT: Address: 0x0
-# CHECK-NEXT: Offset: 0x100018
+# CHECK-NEXT: Offset: 0x138
# CHECK-NEXT: Size: 48
# CHECK-NEXT: Link: 5
# CHECK-NEXT: Info: 1
@@ -104,7 +104,7 @@ _start:
# CHECK-NEXT: Flags [ (0x0)
# CHECK-NEXT: ]
# CHECK-NEXT: Address: 0x0
-# CHECK-NEXT: Offset: 0x100048
+# CHECK-NEXT: Offset: 0x168
# CHECK-NEXT: Size: 42
# CHECK-NEXT: Link: 0
# CHECK-NEXT: Info: 0
@@ -118,7 +118,7 @@ _start:
# CHECK-NEXT: Flags [ (0x0)
# CHECK-NEXT: ]
# CHECK-NEXT: Address: 0x0
-# CHECK-NEXT: Offset: 0x100072
+# CHECK-NEXT: Offset: 0x192
# CHECK-NEXT: Size: 8
# CHECK-NEXT: Link: 0
# CHECK-NEXT: Info: 0
@@ -150,8 +150,8 @@ _start:
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_PHDR (0x6)
# CHECK-NEXT: Offset: 0x40
-# CHECK-NEXT: VirtualAddress: 0x100040
-# CHECK-NEXT: PhysicalAddress: 0x100040
+# CHECK-NEXT: VirtualAddress: 0x200040
+# CHECK-NEXT: PhysicalAddress: 0x200040
# CHECK-NEXT: FileSize: 224
# CHECK-NEXT: MemSize: 224
# CHECK-NEXT: Flags [ (0x4)
@@ -162,8 +162,8 @@ _start:
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_LOAD (0x1)
# CHECK-NEXT: Offset: 0x0
-# CHECK-NEXT: VirtualAddress: 0x100000
-# CHECK-NEXT: PhysicalAddress: 0x100000
+# CHECK-NEXT: VirtualAddress: 0x200000
+# CHECK-NEXT: PhysicalAddress: 0x200000
# CHECK-NEXT: FileSize: 288
# CHECK-NEXT: MemSize: 288
# CHECK-NEXT: Flags [
@@ -173,9 +173,9 @@ _start:
# CHECK-NEXT: }
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_LOAD (0x1)
-# CHECK-NEXT: Offset: 0x100000
-# CHECK-NEXT: VirtualAddress: 0x200000
-# CHECK-NEXT: PhysicalAddress: 0x200000
+# CHECK-NEXT: Offset: 0x120
+# CHECK-NEXT: VirtualAddress: 0x200120
+# CHECK-NEXT: PhysicalAddress: 0x200120
# CHECK-NEXT: FileSize: 12
# CHECK-NEXT: MemSize: 12
# CHECK-NEXT: Flags [ (0x5)
More information about the llvm-commits
mailing list