[llvm] r370140 - AMDGPU/GlobalISel: Implement addrspacecast for 32-bit constant addrspace
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 27 17:58:24 PDT 2019
Author: arsenm
Date: Tue Aug 27 17:58:24 2019
New Revision: 370140
URL: http://llvm.org/viewvc/llvm-project?rev=370140&view=rev
Log:
AMDGPU/GlobalISel: Implement addrspacecast for 32-bit constant addrspace
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=370140&r1=370139&r2=370140&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Tue Aug 27 17:58:24 2019
@@ -499,11 +499,9 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo
return std::make_pair(0, LLT::scalar(Query.Types[1].getSizeInBits()));
});
- if (ST.hasFlatAddressSpace()) {
- getActionDefinitionsBuilder(G_ADDRSPACE_CAST)
- .scalarize(0)
- .custom();
- }
+ getActionDefinitionsBuilder(G_ADDRSPACE_CAST)
+ .scalarize(0)
+ .custom();
// TODO: Should load to s16 be legal? Most loads extend to 32-bits, but we
// handle some operations by just promoting the register during
@@ -903,6 +901,7 @@ bool AMDGPULegalizerInfo::legalizeAddrSp
MIRBuilder.setInstr(MI);
+ const LLT S32 = LLT::scalar(32);
Register Dst = MI.getOperand(0).getReg();
Register Src = MI.getOperand(1).getReg();
@@ -924,6 +923,27 @@ bool AMDGPULegalizerInfo::legalizeAddrSp
return true;
}
+ if (DestAS == AMDGPUAS::CONSTANT_ADDRESS_32BIT) {
+ // Truncate.
+ MIRBuilder.buildExtract(Dst, Src, 0);
+ MI.eraseFromParent();
+ return true;
+ }
+
+ if (SrcAS == AMDGPUAS::CONSTANT_ADDRESS_32BIT) {
+ const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
+ uint32_t AddrHiVal = Info->get32BitAddressHighBits();
+
+ // FIXME: This is a bit ugly due to creating a merge of 2 pointers to
+ // another. Merge operands are required to be the same type, but creating an
+ // extra ptrtoint would be kind of pointless.
+ auto HighAddr = MIRBuilder.buildConstant(
+ LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS_32BIT, 32), AddrHiVal);
+ MIRBuilder.buildMerge(Dst, {Src, HighAddr.getReg(0)});
+ MI.eraseFromParent();
+ return true;
+ }
+
if (SrcAS == AMDGPUAS::FLAT_ADDRESS) {
assert(DestAS == AMDGPUAS::LOCAL_ADDRESS ||
DestAS == AMDGPUAS::PRIVATE_ADDRESS);
@@ -945,8 +965,11 @@ bool AMDGPULegalizerInfo::legalizeAddrSp
return true;
}
- assert(SrcAS == AMDGPUAS::LOCAL_ADDRESS ||
- SrcAS == AMDGPUAS::PRIVATE_ADDRESS);
+ if (SrcAS != AMDGPUAS::LOCAL_ADDRESS && SrcAS != AMDGPUAS::PRIVATE_ADDRESS)
+ return false;
+
+ if (!ST.hasFlatAddressSpace())
+ return false;
auto SegmentNull =
MIRBuilder.buildConstant(SrcTy, TM.getNullPointerValue(SrcAS));
@@ -961,7 +984,7 @@ bool AMDGPULegalizerInfo::legalizeAddrSp
Register BuildPtr = MRI.createGenericVirtualRegister(DstTy);
// Coerce the type of the low half of the result so we can use merge_values.
- Register SrcAsInt = MRI.createGenericVirtualRegister(LLT::scalar(32));
+ Register SrcAsInt = MRI.createGenericVirtualRegister(S32);
MIRBuilder.buildInstr(TargetOpcode::G_PTRTOINT)
.addDef(SrcAsInt)
.addUse(Src);
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir?rev=370140&r1=370139&r2=370140&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir Tue Aug 27 17:58:24 2019
@@ -1,6 +1,7 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -O0 -run-pass=legalizer -global-isel-abort=0 -o - %s | FileCheck -check-prefix=VI %s
# RUN: llc -march=amdgcn -mcpu=gfx900 -O0 -run-pass=legalizer -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
+# RUN: llc -march=amdgcn -mcpu=tahiti -O0 -run-pass=legalizer -global-isel-abort=0 -o - %s | FileCheck -check-prefix=SI %s
---
name: test_addrspacecast_p0_to_p1
@@ -16,6 +17,10 @@ body: |
; GFX9: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
; GFX9: [[BITCAST:%[0-9]+]]:_(p1) = G_BITCAST [[COPY]](p0)
; GFX9: $vgpr0_vgpr1 = COPY [[BITCAST]](p1)
+ ; SI-LABEL: name: test_addrspacecast_p0_to_p1
+ ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
+ ; SI: [[BITCAST:%[0-9]+]]:_(p1) = G_BITCAST [[COPY]](p0)
+ ; SI: $vgpr0_vgpr1 = COPY [[BITCAST]](p1)
%0:_(p0) = COPY $vgpr0_vgpr1
%1:_(p1) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1 = COPY %1
@@ -35,6 +40,10 @@ body: |
; GFX9: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9: [[BITCAST:%[0-9]+]]:_(p0) = G_BITCAST [[COPY]](p1)
; GFX9: $vgpr0_vgpr1 = COPY [[BITCAST]](p0)
+ ; SI-LABEL: name: test_addrspacecast_p1_to_p0
+ ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
+ ; SI: [[BITCAST:%[0-9]+]]:_(p0) = G_BITCAST [[COPY]](p1)
+ ; SI: $vgpr0_vgpr1 = COPY [[BITCAST]](p0)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p0) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1 = COPY %1
@@ -54,6 +63,10 @@ body: |
; GFX9: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
; GFX9: [[BITCAST:%[0-9]+]]:_(p4) = G_BITCAST [[COPY]](p0)
; GFX9: $vgpr0_vgpr1 = COPY [[BITCAST]](p4)
+ ; SI-LABEL: name: test_addrspacecast_p0_to_p4
+ ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
+ ; SI: [[BITCAST:%[0-9]+]]:_(p4) = G_BITCAST [[COPY]](p0)
+ ; SI: $vgpr0_vgpr1 = COPY [[BITCAST]](p4)
%0:_(p0) = COPY $vgpr0_vgpr1
%1:_(p4) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1 = COPY %1
@@ -73,6 +86,10 @@ body: |
; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1
; GFX9: [[BITCAST:%[0-9]+]]:_(p0) = G_BITCAST [[COPY]](p4)
; GFX9: $vgpr0_vgpr1 = COPY [[BITCAST]](p0)
+ ; SI-LABEL: name: test_addrspacecast_p4_to_p0
+ ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1
+ ; SI: [[BITCAST:%[0-9]+]]:_(p0) = G_BITCAST [[COPY]](p4)
+ ; SI: $vgpr0_vgpr1 = COPY [[BITCAST]](p0)
%0:_(p4) = COPY $vgpr0_vgpr1
%1:_(p0) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1 = COPY %1
@@ -92,6 +109,10 @@ body: |
; GFX9: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
; GFX9: [[BITCAST:%[0-9]+]]:_(p999) = G_BITCAST [[COPY]](p0)
; GFX9: $vgpr0_vgpr1 = COPY [[BITCAST]](p999)
+ ; SI-LABEL: name: test_addrspacecast_p0_to_p999
+ ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
+ ; SI: [[BITCAST:%[0-9]+]]:_(p999) = G_BITCAST [[COPY]](p0)
+ ; SI: $vgpr0_vgpr1 = COPY [[BITCAST]](p999)
%0:_(p0) = COPY $vgpr0_vgpr1
%1:_(p999) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1 = COPY %1
@@ -111,6 +132,10 @@ body: |
; GFX9: [[COPY:%[0-9]+]]:_(p999) = COPY $vgpr0_vgpr1
; GFX9: [[BITCAST:%[0-9]+]]:_(p0) = G_BITCAST [[COPY]](p999)
; GFX9: $vgpr0_vgpr1 = COPY [[BITCAST]](p0)
+ ; SI-LABEL: name: test_addrspacecast_p999_to_p0
+ ; SI: [[COPY:%[0-9]+]]:_(p999) = COPY $vgpr0_vgpr1
+ ; SI: [[BITCAST:%[0-9]+]]:_(p0) = G_BITCAST [[COPY]](p999)
+ ; SI: $vgpr0_vgpr1 = COPY [[BITCAST]](p0)
%0:_(p999) = COPY $vgpr0_vgpr1
%1:_(p0) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1 = COPY %1
@@ -147,6 +172,10 @@ body: |
; GFX9: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[SHL]](s32)
; GFX9: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
; GFX9: $vgpr0_vgpr1 = COPY [[SELECT]](p0)
+ ; SI-LABEL: name: test_addrspacecast_p5_to_p0
+ ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0
+ ; SI: [[ADDRSPACE_CAST:%[0-9]+]]:_(p0) = G_ADDRSPACE_CAST [[COPY]](p5)
+ ; SI: $vgpr0_vgpr1 = COPY [[ADDRSPACE_CAST]](p0)
%0:_(p5) = COPY $vgpr0
%1:_(p0) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1 = COPY %1
@@ -174,6 +203,14 @@ body: |
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p0), [[C1]]
; GFX9: [[SELECT:%[0-9]+]]:_(p5) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
; GFX9: $vgpr0 = COPY [[SELECT]](p5)
+ ; SI-LABEL: name: test_addrspacecast_p0_to_p5
+ ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
+ ; SI: [[C:%[0-9]+]]:_(p5) = G_CONSTANT i32 0
+ ; SI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
+ ; SI: [[EXTRACT:%[0-9]+]]:_(p5) = G_EXTRACT [[COPY]](p0), 0
+ ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p0), [[C1]]
+ ; SI: [[SELECT:%[0-9]+]]:_(p5) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
+ ; SI: $vgpr0 = COPY [[SELECT]](p5)
%0:_(p0) = COPY $vgpr0_vgpr1
%1:_(p5) = G_ADDRSPACE_CAST %0
$vgpr0 = COPY %1
@@ -210,6 +247,10 @@ body: |
; GFX9: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[SHL]](s32)
; GFX9: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
; GFX9: $vgpr0_vgpr1 = COPY [[SELECT]](p0)
+ ; SI-LABEL: name: test_addrspacecast_p3_to_p0
+ ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
+ ; SI: [[ADDRSPACE_CAST:%[0-9]+]]:_(p0) = G_ADDRSPACE_CAST [[COPY]](p3)
+ ; SI: $vgpr0_vgpr1 = COPY [[ADDRSPACE_CAST]](p0)
%0:_(p3) = COPY $vgpr0
%1:_(p0) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1 = COPY %1
@@ -237,6 +278,14 @@ body: |
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p0), [[C1]]
; GFX9: [[SELECT:%[0-9]+]]:_(p3) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
; GFX9: $vgpr0 = COPY [[SELECT]](p3)
+ ; SI-LABEL: name: test_addrspacecast_p0_to_p3
+ ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
+ ; SI: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
+ ; SI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
+ ; SI: [[EXTRACT:%[0-9]+]]:_(p3) = G_EXTRACT [[COPY]](p0), 0
+ ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p0), [[C1]]
+ ; SI: [[SELECT:%[0-9]+]]:_(p3) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
+ ; SI: $vgpr0 = COPY [[SELECT]](p3)
%0:_(p0) = COPY $vgpr0_vgpr1
%1:_(p3) = G_ADDRSPACE_CAST %0
$vgpr0 = COPY %1
@@ -262,6 +311,13 @@ body: |
; GFX9: [[BITCAST1:%[0-9]+]]:_(p1) = G_BITCAST [[UV1]](p0)
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[BITCAST]](p1), [[BITCAST1]](p1)
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p1>)
+ ; SI-LABEL: name: test_addrspacecast_v2p0_to_v2p1
+ ; SI: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+ ; SI: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<2 x p0>)
+ ; SI: [[BITCAST:%[0-9]+]]:_(p1) = G_BITCAST [[UV]](p0)
+ ; SI: [[BITCAST1:%[0-9]+]]:_(p1) = G_BITCAST [[UV1]](p0)
+ ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[BITCAST]](p1), [[BITCAST1]](p1)
+ ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p1>)
%0:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x p1>) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
@@ -287,6 +343,13 @@ body: |
; GFX9: [[BITCAST1:%[0-9]+]]:_(p0) = G_BITCAST [[UV1]](p1)
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[BITCAST]](p0), [[BITCAST1]](p0)
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
+ ; SI-LABEL: name: test_addrspacecast_v2p1_to_v2p0
+ ; SI: [[COPY:%[0-9]+]]:_(<2 x p1>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+ ; SI: [[UV:%[0-9]+]]:_(p1), [[UV1:%[0-9]+]]:_(p1) = G_UNMERGE_VALUES [[COPY]](<2 x p1>)
+ ; SI: [[BITCAST:%[0-9]+]]:_(p0) = G_BITCAST [[UV]](p1)
+ ; SI: [[BITCAST1:%[0-9]+]]:_(p0) = G_BITCAST [[UV1]](p1)
+ ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[BITCAST]](p0), [[BITCAST1]](p0)
+ ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
%0:_(<2 x p1>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x p0>) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
@@ -324,6 +387,19 @@ body: |
; GFX9: [[SELECT1:%[0-9]+]]:_(p3) = G_SELECT [[ICMP1]](s1), [[EXTRACT1]], [[C]]
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[SELECT]](p3), [[SELECT1]](p3)
; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x p3>)
+ ; SI-LABEL: name: test_addrspacecast_v2p0_to_v2p3
+ ; SI: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+ ; SI: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<2 x p0>)
+ ; SI: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
+ ; SI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
+ ; SI: [[EXTRACT:%[0-9]+]]:_(p3) = G_EXTRACT [[UV]](p0), 0
+ ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](p0), [[C1]]
+ ; SI: [[SELECT:%[0-9]+]]:_(p3) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
+ ; SI: [[EXTRACT1:%[0-9]+]]:_(p3) = G_EXTRACT [[UV1]](p0), 0
+ ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](p0), [[C1]]
+ ; SI: [[SELECT1:%[0-9]+]]:_(p3) = G_SELECT [[ICMP1]](s1), [[EXTRACT1]], [[C]]
+ ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[SELECT]](p3), [[SELECT1]](p3)
+ ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x p3>)
%0:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x p3>) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1 = COPY %1
@@ -377,7 +453,140 @@ body: |
; GFX9: [[SELECT1:%[0-9]+]]:_(p0) = G_SELECT [[ICMP1]](s1), [[MV1]], [[C1]]
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[SELECT]](p0), [[SELECT1]](p0)
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
+ ; SI-LABEL: name: test_addrspacecast_v2p3_to_v2p0
+ ; SI: [[COPY:%[0-9]+]]:_(<2 x p3>) = COPY $vgpr0_vgpr1
+ ; SI: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[COPY]](<2 x p3>)
+ ; SI: [[ADDRSPACE_CAST:%[0-9]+]]:_(p0) = G_ADDRSPACE_CAST [[UV]](p3)
+ ; SI: [[ADDRSPACE_CAST1:%[0-9]+]]:_(p0) = G_ADDRSPACE_CAST [[UV1]](p3)
+ ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[ADDRSPACE_CAST]](p0), [[ADDRSPACE_CAST1]](p0)
+ ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
%0:_(<2 x p3>) = COPY $vgpr0_vgpr1
%1:_(<2 x p0>) = G_ADDRSPACE_CAST %0
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
...
+
+---
+name: test_addrspacecast_p4_to_p6
+body: |
+ bb.0:
+ liveins: $vgpr0_vgpr1
+
+ ; VI-LABEL: name: test_addrspacecast_p4_to_p6
+ ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1
+ ; VI: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[COPY]](p4), 0
+ ; VI: $vgpr0 = COPY [[EXTRACT]](p6)
+ ; GFX9-LABEL: name: test_addrspacecast_p4_to_p6
+ ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1
+ ; GFX9: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[COPY]](p4), 0
+ ; GFX9: $vgpr0 = COPY [[EXTRACT]](p6)
+ ; SI-LABEL: name: test_addrspacecast_p4_to_p6
+ ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1
+ ; SI: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[COPY]](p4), 0
+ ; SI: $vgpr0 = COPY [[EXTRACT]](p6)
+ %0:_(p4) = COPY $vgpr0_vgpr1
+ %1:_(p6) = G_ADDRSPACE_CAST %0
+ $vgpr0 = COPY %1
+...
+
+---
+name: test_addrspacecast_p6_to_p4_0
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; VI-LABEL: name: test_addrspacecast_p6_to_p4_0
+ ; VI: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0
+ ; VI: [[C:%[0-9]+]]:_(p6) = G_CONSTANT i32 0
+ ; VI: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
+ ; VI: $vgpr0_vgpr1 = COPY [[MV]](p4)
+ ; GFX9-LABEL: name: test_addrspacecast_p6_to_p4_0
+ ; GFX9: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0
+ ; GFX9: [[C:%[0-9]+]]:_(p6) = G_CONSTANT i32 0
+ ; GFX9: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
+ ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](p4)
+ ; SI-LABEL: name: test_addrspacecast_p6_to_p4_0
+ ; SI: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0
+ ; SI: [[C:%[0-9]+]]:_(p6) = G_CONSTANT i32 0
+ ; SI: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
+ ; SI: $vgpr0_vgpr1 = COPY [[MV]](p4)
+ %0:_(p6) = COPY $vgpr0
+ %1:_(p4) = G_ADDRSPACE_CAST %0
+ $vgpr0_vgpr1 = COPY %1
+...
+
+---
+name: test_addrspacecast_p6_to_p4_0xdeadbeef
+machineFunctionInfo:
+ highBitsOf32BitAddress: 0xdeadbeef
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; VI-LABEL: name: test_addrspacecast_p6_to_p4_0xdeadbeef
+ ; VI: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0
+ ; VI: [[C:%[0-9]+]]:_(p6) = G_CONSTANT i32 -559038737
+ ; VI: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
+ ; VI: $vgpr0_vgpr1 = COPY [[MV]](p4)
+ ; GFX9-LABEL: name: test_addrspacecast_p6_to_p4_0xdeadbeef
+ ; GFX9: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0
+ ; GFX9: [[C:%[0-9]+]]:_(p6) = G_CONSTANT i32 -559038737
+ ; GFX9: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
+ ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](p4)
+ ; SI-LABEL: name: test_addrspacecast_p6_to_p4_0xdeadbeef
+ ; SI: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0
+ ; SI: [[C:%[0-9]+]]:_(p6) = G_CONSTANT i32 -559038737
+ ; SI: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
+ ; SI: $vgpr0_vgpr1 = COPY [[MV]](p4)
+ %0:_(p6) = COPY $vgpr0
+ %1:_(p4) = G_ADDRSPACE_CAST %0
+ $vgpr0_vgpr1 = COPY %1
+...
+
+---
+name: test_addrspacecast_p0_to_p6
+body: |
+ bb.0:
+ liveins: $vgpr0_vgpr1
+
+ ; VI-LABEL: name: test_addrspacecast_p0_to_p6
+ ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
+ ; VI: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[COPY]](p0), 0
+ ; VI: $vgpr0 = COPY [[EXTRACT]](p6)
+ ; GFX9-LABEL: name: test_addrspacecast_p0_to_p6
+ ; GFX9: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
+ ; GFX9: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[COPY]](p0), 0
+ ; GFX9: $vgpr0 = COPY [[EXTRACT]](p6)
+ ; SI-LABEL: name: test_addrspacecast_p0_to_p6
+ ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
+ ; SI: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[COPY]](p0), 0
+ ; SI: $vgpr0 = COPY [[EXTRACT]](p6)
+ %0:_(p0) = COPY $vgpr0_vgpr1
+ %1:_(p6) = G_ADDRSPACE_CAST %0
+ $vgpr0 = COPY %1
+...
+
+---
+name: test_addrspacecast_p6_to_p0
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; VI-LABEL: name: test_addrspacecast_p6_to_p0
+ ; VI: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0
+ ; VI: [[C:%[0-9]+]]:_(p6) = G_CONSTANT i32 0
+ ; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
+ ; VI: $vgpr0_vgpr1 = COPY [[MV]](p0)
+ ; GFX9-LABEL: name: test_addrspacecast_p6_to_p0
+ ; GFX9: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0
+ ; GFX9: [[C:%[0-9]+]]:_(p6) = G_CONSTANT i32 0
+ ; GFX9: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
+ ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](p0)
+ ; SI-LABEL: name: test_addrspacecast_p6_to_p0
+ ; SI: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0
+ ; SI: [[C:%[0-9]+]]:_(p6) = G_CONSTANT i32 0
+ ; SI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](p6), [[C]](p6)
+ ; SI: $vgpr0_vgpr1 = COPY [[MV]](p0)
+ %0:_(p6) = COPY $vgpr0
+ %1:_(p0) = G_ADDRSPACE_CAST %0
+ $vgpr0_vgpr1 = COPY %1
+...
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