[lld] r370049 - [ELF][ARM] Allow PT_LOAD to have overlapping p_offset ranges on EM_ARM
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 27 04:52:36 PDT 2019
Author: maskray
Date: Tue Aug 27 04:52:36 2019
New Revision: 370049
URL: http://llvm.org/viewvc/llvm-project?rev=370049&view=rev
Log:
[ELF][ARM] Allow PT_LOAD to have overlapping p_offset ranges on EM_ARM
Port the D64906 technique to ARM. It deletes 3 alignments at
PT_LOAD boundaries for the default case: the size of an arm binary
decreases by at most 12kb.
Reviewed By: grimar
Differential Revision: https://reviews.llvm.org/D66749
Modified:
lld/trunk/ELF/Writer.cpp
lld/trunk/test/ELF/arm-abs32-dyn.s
lld/trunk/test/ELF/arm-bl-v6.s
lld/trunk/test/ELF/arm-branch-undef-weak-plt-thunk.s
lld/trunk/test/ELF/arm-copy.s
lld/trunk/test/ELF/arm-execute-only.s
lld/trunk/test/ELF/arm-exidx-add-missing.s
lld/trunk/test/ELF/arm-exidx-canunwind.s
lld/trunk/test/ELF/arm-exidx-dedup.s
lld/trunk/test/ELF/arm-exidx-emit-relocs.s
lld/trunk/test/ELF/arm-exidx-gc.s
lld/trunk/test/ELF/arm-exidx-order.s
lld/trunk/test/ELF/arm-exidx-shared.s
lld/trunk/test/ELF/arm-fpic-got.s
lld/trunk/test/ELF/arm-gnu-ifunc-plt.s
lld/trunk/test/ELF/arm-gnu-ifunc.s
lld/trunk/test/ELF/arm-got-relative.s
lld/trunk/test/ELF/arm-gotoff.s
lld/trunk/test/ELF/arm-icf-exidx.s
lld/trunk/test/ELF/arm-mov-relocs.s
lld/trunk/test/ELF/arm-pie-relative.s
lld/trunk/test/ELF/arm-plt-reloc.s
lld/trunk/test/ELF/arm-sbrel32.s
lld/trunk/test/ELF/arm-target1.s
lld/trunk/test/ELF/arm-target2.s
lld/trunk/test/ELF/arm-thumb-interwork-shared.s
lld/trunk/test/ELF/arm-thumb-interwork-thunk-v5.s
lld/trunk/test/ELF/arm-thumb-no-undefined-thunk.s
lld/trunk/test/ELF/arm-thumb-plt-range-thunk-os.s
lld/trunk/test/ELF/arm-thumb-plt-reloc.s
lld/trunk/test/ELF/arm-thumb-thunk-empty-pass.s
lld/trunk/test/ELF/arm-thumb-thunk-symbols.s
lld/trunk/test/ELF/arm-thumb-undefined-weak.s
lld/trunk/test/ELF/arm-thunk-largesection.s
lld/trunk/test/ELF/arm-thunk-multipass-plt.s
lld/trunk/test/ELF/arm-thunk-nosuitable.s
lld/trunk/test/ELF/arm-thunk-re-add.s
lld/trunk/test/ELF/arm-tls-gd-nonpreemptible.s
lld/trunk/test/ELF/arm-tls-gd32.s
lld/trunk/test/ELF/arm-tls-ie32.s
lld/trunk/test/ELF/arm-tls-ldm32.s
lld/trunk/test/ELF/arm-tls-le32.s
lld/trunk/test/ELF/arm-tls-norelax-gd-ie.s
lld/trunk/test/ELF/arm-tls-norelax-gd-le.s
lld/trunk/test/ELF/arm-tls-norelax-ie-le.s
lld/trunk/test/ELF/arm-tls-norelax-ld-le.s
lld/trunk/test/ELF/arm-undefined-weak.s
lld/trunk/test/ELF/global-offset-table-position-arm.s
lld/trunk/test/ELF/pack-dyn-relocs-arm2.s
lld/trunk/test/ELF/pack-dyn-relocs.s
Modified: lld/trunk/ELF/Writer.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Writer.cpp?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/ELF/Writer.cpp (original)
+++ lld/trunk/ELF/Writer.cpp Tue Aug 27 04:52:36 2019
@@ -2228,7 +2228,8 @@ template <class ELFT> void Writer<ELFT>:
// TODO Enable this technique on all targets.
bool enable = config->emachine == EM_386 ||
config->emachine == EM_AARCH64 ||
- config->emachine == EM_PPC || config->emachine == EM_PPC64;
+ config->emachine == EM_ARM || config->emachine == EM_PPC ||
+ config->emachine == EM_PPC64;
if (!enable || (config->zSeparateCode && prev &&
(prev->p_flags & PF_X) != (p->p_flags & PF_X)))
Modified: lld/trunk/test/ELF/arm-abs32-dyn.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-abs32-dyn.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-abs32-dyn.s (original)
+++ lld/trunk/test/ELF/arm-abs32-dyn.s Tue Aug 27 04:52:36 2019
@@ -24,18 +24,18 @@ bar:
// RUN: llvm-readelf -x .data %t.so | FileCheck --check-prefix=HEX %s
// CHECK: Dynamic Relocations {
-// CHECK-NEXT: 0x2004 R_ARM_RELATIVE
-// CHECK-NEXT: 0x2008 R_ARM_RELATIVE
-// CHECK-NEXT: 0x2000 R_ARM_ABS32 foo 0x0
+// CHECK-NEXT: 0x3204 R_ARM_RELATIVE
+// CHECK-NEXT: 0x3208 R_ARM_RELATIVE
+// CHECK-NEXT: 0x3200 R_ARM_ABS32 foo 0x0
// CHECK-NEXT: }
// CHECK: Symbols [
// CHECK: Symbol {
// CHECK: Name: bar
-// CHECK-NEXT: Value: 0x1000
+// CHECK-NEXT: Value: 0x11A8
// CHECK: Symbol {
// CHECK: Name: foo
-// CHECK-NEXT: Value: 0x1000
+// CHECK-NEXT: Value: 0x11A8
-// HEX: 0x00002000 00000000 00100000 00100000
+// HEX: 0x00003200 00000000 a8110000 a8110000
Modified: lld/trunk/test/ELF/arm-bl-v6.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-bl-v6.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-bl-v6.s (original)
+++ lld/trunk/test/ELF/arm-bl-v6.s Tue Aug 27 04:52:36 2019
@@ -1,10 +1,10 @@
// REQUIRES: arm
// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv6-none-linux-gnueabi %s -o %t
// RUN: ld.lld %t -o %t2
-// RUN: llvm-objdump -d -triple=armv6-none-linux-gnueabi -start-address=69632 -stop-address=69640 %t2 | FileCheck -check-prefix=CHECK-ARM1 %s
-// RUN: llvm-objdump -d -triple=thumbv6-none-linux-gnueabi %t2 -start-address=69640 -stop-address=69644 | FileCheck -check-prefix=CHECK-THUMB1 %s
-// RUN: llvm-objdump -d -triple=armv6-none-linux-gnueabi -start-address=2166796 -stop-address=2166804 %t2 | FileCheck -check-prefix=CHECK-ARM2 %s
-// RUN: llvm-objdump -d -triple=thumbv6-none-linux-gnueabi %t2 -start-address=6365184 -stop-address=6365186 | FileCheck -check-prefix=CHECK-THUMB2 %s
+// RUN: llvm-objdump -d -triple=armv6-none-linux-gnueabi -start-address=0x12000 -stop-address=0x12008 %t2 | FileCheck -check-prefix=CHECK-ARM1 %s
+// RUN: llvm-objdump -d -triple=thumbv6-none-linux-gnueabi %t2 -start-address=0x12008 -stop-address=0x1200c | FileCheck -check-prefix=CHECK-THUMB1 %s
+// RUN: llvm-objdump -d -triple=armv6-none-linux-gnueabi -start-address=0x21200c -stop-address=0x212014 %t2 | FileCheck -check-prefix=CHECK-ARM2 %s
+// RUN: llvm-objdump -d -triple=thumbv6-none-linux-gnueabi %t2 -start-address=0x613000 -stop-address=0x613002 | FileCheck -check-prefix=CHECK-THUMB2 %s
// On Arm v6 the range of a Thumb BL instruction is only 4 megabytes as the
// extended range encoding is not supported. The following example has a Thumb
@@ -28,8 +28,8 @@ _start:
// CHECK-ARM1: Disassembly of section .text:
// CHECK-ARM1-EMPTY:
// CHECK-ARM1-NEXT: _start:
-// CHECK-ARM1-NEXT: 11000: 00 00 00 fa blx #0 <thumbfunc>
-// CHECK-ARM1-NEXT: 11004: 1e ff 2f e1 bx lr
+// CHECK-ARM1-NEXT: 12000: 00 00 00 fa blx #0 <thumbfunc>
+// CHECK-ARM1-NEXT: 12004: 1e ff 2f e1 bx lr
.thumb
.section .text.2, "ax", %progbits
.globl thumbfunc
@@ -38,16 +38,16 @@ thumbfunc:
bl farthumbfunc
// CHECK-THUMB1: thumbfunc:
-// CHECK-THUMB1-NEXT: 11008: 00 f2 00 e8 blx #2097152
+// CHECK-THUMB1-NEXT: 12008: 00 f2 00 e8 blx #2097152
// 6 Megabytes, enough to make farthumbfunc out of range of caller
// on a v6 Arm, but not on a v7 Arm.
.section .text.3, "ax", %progbits
.space 0x200000
// CHECK-ARM2: __ARMv5ABSLongThunk_farthumbfunc:
-// CHECK-ARM2-NEXT: 21100c: 04 f0 1f e5 ldr pc, [pc, #-4]
+// CHECK-ARM2-NEXT: 21200c: 04 f0 1f e5 ldr pc, [pc, #-4]
// CHECK-ARM2: $d:
-// CHECK-ARM2-NEXT: 211010: 01 20 61 00 .word 0x00612001
+// CHECK-ARM2-NEXT: 212010: 01 30 61 00 .word 0x00613001
.section .text.4, "ax", %progbits
.space 0x200000
@@ -62,4 +62,4 @@ thumbfunc:
farthumbfunc:
bx lr
// CHECK-THUMB2: farthumbfunc:
-// CHECK-THUMB2-NEXT: 612000: 70 47 bx lr
+// CHECK-THUMB2-NEXT: 613000: 70 47 bx lr
Modified: lld/trunk/test/ELF/arm-branch-undef-weak-plt-thunk.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-branch-undef-weak-plt-thunk.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-branch-undef-weak-plt-thunk.s (original)
+++ lld/trunk/test/ELF/arm-branch-undef-weak-plt-thunk.s Tue Aug 27 04:52:36 2019
@@ -3,7 +3,7 @@
// RUN: ld.lld %t1.o --shared -soname=t1.so -o %t1.so
// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t.o
// RUN: ld.lld %t.o %t1.so -o %t
-// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi -start-address=0x11000 -stop-address=0x11020 %t | FileCheck %s
+// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi -start-address=0x111e4 -stop-address=0x11204 %t | FileCheck %s
// When we are dynamic linking, undefined weak references have a PLT entry so
// we must create a thunk for the branch to the PLT entry.
@@ -24,13 +24,13 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: _start:
-// CHECK-NEXT: 11000: 00 00 00 ea b #0 <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>
-// CHECK-NEXT: 11004: 02 00 00 eb bl #8 <__ARMv7ABSLongThunk_bar2>
+// CHECK-NEXT: 111e4: 00 00 00 ea b #0 <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>
+// CHECK-NEXT: 111e8: 02 00 00 eb bl #8 <__ARMv7ABSLongThunk_bar2>
// CHECK: __ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for:
-// CHECK-NEXT: 11008: 40 c0 01 e3 movw r12, #4160
-// CHECK-NEXT: 1100c: 01 c2 40 e3 movt r12, #513
-// CHECK-NEXT: 11010: 1c ff 2f e1 bx r12
+// CHECK-NEXT: 111ec: 30 c2 01 e3 movw r12, #4656
+// CHECK-NEXT: 111f0: 01 c2 40 e3 movt r12, #513
+// CHECK-NEXT: 111f4: 1c ff 2f e1 bx r12
// CHECK: __ARMv7ABSLongThunk_bar2:
-// CHECK-NEXT: 11014: 50 c0 01 e3 movw r12, #4176
-// CHECK-NEXT: 11018: 01 c2 40 e3 movt r12, #513
-// CHECK-NEXT: 1101c: 1c ff 2f e1 bx r12
+// CHECK-NEXT: 111f8: 40 c2 01 e3 movw r12, #4672
+// CHECK-NEXT: 111fc: 01 c2 40 e3 movt r12, #513
+// CHECK-NEXT: 11200: 1c ff 2f e1 bx r12
Modified: lld/trunk/test/ELF/arm-copy.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-copy.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-copy.s (original)
+++ lld/trunk/test/ELF/arm-copy.s Tue Aug 27 04:52:36 2019
@@ -25,7 +25,7 @@ _start:
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x13000
+// CHECK-NEXT: Address: 0x13220
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 8
// CHECK-NEXT: Link:
@@ -35,13 +35,13 @@ _start:
// CHECK: Relocations [
// CHECK-NEXT: Section {{.*}} .rel.dyn {
// CHECK-NEXT: Relocation {
-// CHECK-NEXT: Offset: 0x13000
+// CHECK-NEXT: Offset: 0x13220
// CHECK-NEXT: Type: R_ARM_COPY
// CHECK-NEXT: Symbol: y
// CHECK-NEXT: Addend: 0x0
// CHECK-NEXT: }
// CHECK-NEXT: Relocation {
-// CHECK-NEXT: Offset: 0x13004
+// CHECK-NEXT: Offset: 0x13224
// CHECK-NEXT: Type: R_ARM_COPY
// CHECK-NEXT: Symbol: z
// CHECK-NEXT: Addend: 0x0
@@ -50,14 +50,14 @@ _start:
// CHECK: Symbols [
// CHECK: Name: y
-// CHECK-NEXT: Value: 0x13000
+// CHECK-NEXT: Value: 0x13220
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
// CHECK-NEXT: Other:
// CHECK-NEXT: Section: .bss
// CHECK: Name: z
-// CHECK-NEXT: Value: 0x13004
+// CHECK-NEXT: Value: 0x13224
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
@@ -67,16 +67,13 @@ _start:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
// CODE-NEXT: _start:
-// S(y) = 0x13000, A = 0
-// (S + A) & 0x0000ffff = 0x3000 = #12288
-// CODE-NEXT: 11000: movw r2, #12288
-// S(y) = 0x13000, A = 0
-// ((S + A) & 0xffff0000) >> 16 = 0x1
-// CODE-NEXT: 11004: movt r2, #1
-// CODE-NEXT: 11008: ldr r3, [pc, #4]
-// CODE-NEXT: 1100c: ldr r3, [r3]
+// S + A = 0x13220 + 0 = 65536 * 1 + 12832
+// CODE-NEXT: 111b4: movw r2, #12832
+// CODE-NEXT: 111b8: movt r2, #1
+// CODE-NEXT: 111bc: ldr r3, [pc, #4]
+// CODE-NEXT: 111c0: ldr r3, [r3]
// RODATA: Contents of section .rodata:
// S(z) = 0x13004
-// RODATA-NEXT: 101b0 04300100
+// RODATA-NEXT: 101b0 24320100
Modified: lld/trunk/test/ELF/arm-execute-only.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-execute-only.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-execute-only.s (original)
+++ lld/trunk/test/ELF/arm-execute-only.s Tue Aug 27 04:52:36 2019
@@ -11,9 +11,9 @@
// RUN: llvm-readelf -l %t.so | FileCheck --check-prefix=DIFF --implicit-check-not=LOAD %s
// CHECK: LOAD 0x000000 0x00000000 0x00000000 0x0016d 0x0016d R 0x1000
-// CHECK: LOAD 0x001000 0x00001000 0x00001000 0x{{.*}} 0x{{.*}} R E 0x1000
-// CHECK: LOAD 0x002000 0x00002000 0x00002000 0x{{.*}} 0x{{.*}} E 0x1000
-// CHECK: LOAD 0x003000 0x00003000 0x00003000 0x00038 0x00038 RW 0x1000
+// CHECK: LOAD 0x000170 0x00001170 0x00001170 0x{{.*}} 0x{{.*}} R E 0x1000
+// CHECK: LOAD 0x000174 0x00002174 0x00002174 0x{{.*}} 0x{{.*}} E 0x1000
+// CHECK: LOAD 0x000178 0x00003178 0x00003178 0x00038 0x00038 RW 0x1000
// CHECK: 01 .dynsym .gnu.hash .hash .dynstr
// CHECK: 02 .text
@@ -21,8 +21,8 @@
// CHECK: 04 .dynamic
// DIFF: LOAD 0x000000 0x00000000 0x00000000 0x0014d 0x0014d R 0x1000
-// DIFF: LOAD 0x001000 0x00001000 0x00001000 0x0000c 0x0000c R E 0x1000
-// DIFF: LOAD 0x002000 0x00002000 0x00002000 0x00038 0x00038 RW 0x1000
+// DIFF: LOAD 0x000150 0x00001150 0x00001150 0x0000c 0x0000c R E 0x1000
+// DIFF: LOAD 0x00015c 0x0000215c 0x0000215c 0x00038 0x00038 RW 0x1000
// DIFF: 01 .dynsym .gnu.hash .hash .dynstr
// DIFF: 02 .text .foo
Modified: lld/trunk/test/ELF/arm-exidx-add-missing.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-exidx-add-missing.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-exidx-add-missing.s (original)
+++ lld/trunk/test/ELF/arm-exidx-add-missing.s Tue Aug 27 04:52:36 2019
@@ -53,14 +53,14 @@ __aeabi_unwind_cpp_pr0:
bx lr
// f1, f2
-// CHECK: 100d4 2c0f0000 08849780 280f0000 01000000
+// CHECK: 100d4 28100000 08849780 24100000 01000000
// f3, __aeabi_unwind_cpp_pr0
-// CHECK-NEXT: 100e4 240f0000 01000000 200f0000 01000000
+// CHECK-NEXT: 100e4 20100000 01000000 1c100000 01000000
// sentinel
-// CHECK-NEXT: 100f4 1c0f0000 01000000
+// CHECK-NEXT: 100f4 18100000 01000000
// f1, (f2, f3, __aeabi_unwind_cpp_pr0)
-// CHECK-MERGE: 100d4 2c0f0000 08849780 280f0000 01000000
+// CHECK-MERGE: 100d4 18100000 08849780 14100000 01000000
// sentinel
-// CHECK-MERGE-NEXT: 100e4 2c0f0000 01000000
+// CHECK-MERGE-NEXT: 100e4 18100000 01000000
Modified: lld/trunk/test/ELF/arm-exidx-canunwind.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-exidx-canunwind.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-exidx-canunwind.s (original)
+++ lld/trunk/test/ELF/arm-exidx-canunwind.s Tue Aug 27 04:52:36 2019
@@ -55,26 +55,26 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: _start:
-// CHECK-NEXT: 11000: bl #4 <func1>
-// CHECK-NEXT: 11004: bl #4 <func2>
-// CHECK-NEXT: 11008: bx lr
+// CHECK-NEXT: 11108: bl #4 <func1>
+// CHECK-NEXT: bl #4 <func2>
+// CHECK-NEXT: bx lr
// CHECK: func1:
-// CHECK-NEXT: 1100c: bx lr
+// CHECK-NEXT: 11114: bx lr
// CHECK: func2:
-// CHECK-NEXT: 11010: bx lr
+// CHECK-NEXT: 11118: bx lr
// CHECK: __gxx_personality_v0:
-// CHECK-NEXT: 11014: bx lr
+// CHECK-NEXT: 1111c: bx lr
// CHECK: __aeabi_unwind_cpp_pr0:
-// CHECK-NEXT: 11018: bx lr
+// CHECK-NEXT: 11120: bx lr
-// 100d4 + f2c = 11000 = main (linker generated cantunwind)
-// 100dc + f30 = 1100c = func1 (inline unwinding data)
-// CHECK-EXIDX: 100d4 2c0f0000 01000000 300f0000 08849780
-// 100e4 + f2c = 11010 = func2 (100e8 + 14 = 100fc = .ARM.extab entry)
-// 100ec + f28 = 11014 = __gcc_personality_v0 (linker generated cantunwind)
-// CHECK-EXIDX-NEXT: 100e4 2c0f0000 14000000 280f0000 01000000
-// 100f4 + f28 = 1101c = sentinel
-// CHECK-EXIDX-NEXT: 100f4 280f0000 01000000
+// 100d4 + 0x1034 = 0x11108 = main (linker generated cantunwind)
+// 100dc + 0x1038 = 0x11114 = func1 (inline unwinding data)
+// CHECK-EXIDX: 100d4 34100000 01000000 38100000 08849780
+// 100e4 + 0x1034 = 0x11118 = func2 (100e8 + 14 = 100fc = .ARM.extab entry)
+// 100ec + 0x1030 = 0x1111c = __gxx_personality_v0 (linker generated cantunwind)
+// CHECK-EXIDX-NEXT: 100e4 34100000 14000000 30100000 01000000
+// 100f4 + 0x1030 = 1101c = sentinel
+// CHECK-EXIDX-NEXT: 100f4 30100000 01000000
// CHECK-PT: Name: .ARM.exidx
// CHECK-PT-NEXT: Type: SHT_ARM_EXIDX (0x70000001)
Modified: lld/trunk/test/ELF/arm-exidx-dedup.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-exidx-dedup.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-exidx-dedup.s (original)
+++ lld/trunk/test/ELF/arm-exidx-dedup.s Tue Aug 27 04:52:36 2019
@@ -11,19 +11,19 @@
// With duplicate entries
// CHECK-DUPS: Contents of section .ARM.exidx:
-// CHECK-DUPS-NEXT: 100d4 2c0f0000 01000000 280f0000 01000000
-// CHECK-DUPS-NEXT: 100e4 240f0000 01000000 200f0000 01000000
-// CHECK-DUPS-NEXT: 100f4 1c0f0000 08849780 180f0000 08849780
-// CHECK-DUPS-NEXT: 10104 140f0000 08849780 100f0000 24000000
-// CHECK-DUPS-NEXT: 10114 0c0f0000 28000000 080f0000 01000000
-// CHECK-DUPS-NEXT: 10124 040f0000 01000000 000f0000 01000000
+// CHECK-DUPS-NEXT: 100d4 78100000 01000000 74100000 01000000
+// CHECK-DUPS-NEXT: 100e4 70100000 01000000 6c100000 01000000
+// CHECK-DUPS-NEXT: 100f4 68100000 08849780 64100000 08849780
+// CHECK-DUPS-NEXT: 10104 60100000 08849780 5c100000 24000000
+// CHECK-DUPS-NEXT: 10114 58100000 28000000 54100000 01000000
+// CHECK-DUPS-NEXT: 10124 50100000 01000000 4c100000 01000000
// CHECK-DUPS-NEXT: Contents of section .ARM.extab:
// After duplicate entry removal
// CHECK: Contents of section .ARM.exidx:
-// CHECK-NEXT: 100d4 2c0f0000 01000000 340f0000 08849780
-// CHECK-NEXT: 100e4 380f0000 1c000000 340f0000 20000000
-// CHECK-NEXT: 100f4 300f0000 01000000 300f0000 01000000
+// CHECK-NEXT: 100d4 48100000 01000000 50100000 08849780
+// CHECK-NEXT: 100e4 54100000 1c000000 50100000 20000000
+// CHECK-NEXT: 100f4 4c100000 01000000 4c100000 01000000
// CHECK-NEXT: Contents of section .ARM.extab:
.syntax unified
Modified: lld/trunk/test/ELF/arm-exidx-emit-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-exidx-emit-relocs.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-exidx-emit-relocs.s (original)
+++ lld/trunk/test/ELF/arm-exidx-emit-relocs.s Tue Aug 27 04:52:36 2019
@@ -64,8 +64,8 @@ __aeabi_unwind_cpp_pr0:
bx lr
// CHECK: Contents of section .ARM.exidx:
-// CHECK-NEXT: 100d4 2c0f0000 08849780 2c0f0000 01000000
-// CHECK-NEXT: 100e4 2c0f0000 08849780 280f0000 01000000
-// CHECK-NEXT: 100f4 240f0000 01000000
+// CHECK-NEXT: 100d4 28100000 08849780 28100000 01000000
+// CHECK-NEXT: 100e4 28100000 08849780 24100000 01000000
+// CHECK-NEXT: 100f4 20100000 01000000
// CHECK-RELOCS-NOT: Relocation section '.rel.ARM.exidx'
Modified: lld/trunk/test/ELF/arm-exidx-gc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-exidx-gc.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-exidx-gc.s (original)
+++ lld/trunk/test/ELF/arm-exidx-gc.s Tue Aug 27 04:52:36 2019
@@ -93,17 +93,17 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: _start:
-// CHECK-NEXT: 11000: bl #4 <func1>
-// CHECK-NEXT: 11004: bl #4 <func2>
-// CHECK-NEXT: 11008: bx lr
+// CHECK-NEXT: 1110c: bl #4 <func1>
+// CHECK-NEXT: 11110: bl #4 <func2>
+// CHECK-NEXT: 11114: bx lr
// CHECK: func1:
-// CHECK-NEXT: 1100c: bx lr
+// CHECK-NEXT: 11118: bx lr
// CHECK: func2:
-// CHECK-NEXT: 11010: bx lr
+// CHECK-NEXT: 1111c: bx lr
// CHECK: __gxx_personality_v0:
-// CHECK-NEXT: 11014: bx lr
+// CHECK-NEXT: 11120: bx lr
// CHECK: __aeabi_unwind_cpp_pr0:
-// CHECK-NEXT: 11018: bx lr
+// CHECK-NEXT: 11124: bx lr
// GC should have removed table entries for unusedfunc1, unusedfunc2
// and __gxx_personality_v1
@@ -112,15 +112,15 @@ _start:
// CHECK-NOT: __gxx_personality_v1
// CHECK-EXIDX: Contents of section .ARM.exidx:
-// 100d4 + f2c = 11000
-// 100dc + f30 = 1100c = func1
-// CHECK-EXIDX-NEXT: 100d4 2c0f0000 01000000 300f0000 08849780
-// 100e4 + f2c = 11010 = func2 (100e8 + 1c = 10104 = .ARM.extab)
-// 100ec + f28 = 11014 = __gxx_personality_v0
-// CHECK-EXIDX-NEXT: 100e4 2c0f0000 1c000000 280f0000 01000000
-// 100f4 + f24 = 11018 = __aeabi_unwind_cpp_pr0
-// 100fc + f20 = 1101c = __aeabi_unwind_cpp_pr0 + sizeof(__aeabi_unwind_cpp_pr0)
-// CHECK-EXIDX-NEXT: 100f4 240f0000 01000000 200f0000 01000000
+// 100d4 + 1038 = 1110c = _start
+// 100dc + 103c = 11118 = func1
+// CHECK-EXIDX-NEXT: 100d4 38100000 01000000 3c100000 08849780
+// 100e4 + 1038 = 1111c = func2 (100e8 + 1c = 10104 = .ARM.extab)
+// 100ec + 1034 = 11120 = __gxx_personality_v0
+// CHECK-EXIDX-NEXT: 100e4 38100000 1c000000 34100000 01000000
+// 100f4 + 1030 = 11018 = __aeabi_unwind_cpp_pr0
+// 100fc + 102c = 1101c = __aeabi_unwind_cpp_pr0 + sizeof(__aeabi_unwind_cpp_pr0)
+// CHECK-EXIDX-NEXT: 100f4 30100000 01000000 2c100000 01000000
// CHECK-EXIDX-NEXT: Contents of section .ARM.extab:
-// 10104 + f10 = 11014 = __gxx_personality_v0
-// CHECK-EXIDX-NEXT: 10104 100f0000 b0b0b000
+// 10104 + 101c = 11120 = __gxx_personality_v0
+// CHECK-EXIDX-NEXT: 10104 1c100000 b0b0b000
Modified: lld/trunk/test/ELF/arm-exidx-order.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-exidx-order.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-exidx-order.s (original)
+++ lld/trunk/test/ELF/arm-exidx-order.s Tue Aug 27 04:52:36 2019
@@ -56,29 +56,29 @@ f3:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK: _start:
-// CHECK-NEXT: 11000: bx lr
+// CHECK-NEXT: 11124: bx lr
// CHECK: f1:
-// CHECK-NEXT: 11004: bx lr
+// CHECK-NEXT: 11128: bx lr
// CHECK: f2:
-// CHECK-NEXT: 11008: bx lr
+// CHECK-NEXT: 1112c: bx lr
// CHECK: f3:
-// CHECK-NEXT: 1100c: bx lr
+// CHECK-NEXT: 11130: bx lr
// CHECK: func4:
-// CHECK-NEXT: 11010: bx lr
+// CHECK-NEXT: 11134: bx lr
// CHECK: func5:
-// CHECK-NEXT: 11014: bx lr
+// CHECK-NEXT: 11138: bx lr
// CHECK: Disassembly of section .func1:
// CHECK-EMPTY:
// CHECK-NEXT: func1:
-// CHECK-NEXT: 11018: bx lr
+// CHECK-NEXT: 1113c: bx lr
// CHECK: Disassembly of section .func2:
// CHECK-EMPTY:
// CHECK-NEXT: func2:
-// CHECK-NEXT: 1101c: bx lr
+// CHECK-NEXT: 11140: bx lr
// CHECK: Disassembly of section .func3:
// CHECK-EMPTY:
// CHECK-NEXT: func3:
-// CHECK-NEXT: 11020: bx lr
+// CHECK-NEXT: 11144: bx lr
// Each .ARM.exidx section has two 4 byte fields
// Field 1 is the 31-bit offset to the function. The top bit is used to
@@ -88,20 +88,20 @@ f3:
// We expect to see the entries in the same order as the functions
// CHECK-EXIDX: Contents of section .ARM.exidx:
-// 100d4 + f2c = 11000 = _start
-// 100dc + f28 = 11004 = f1
-// CHECK-EXIDX-NEXT: 100d4 2c0f0000 01000000 280f0000 01000000
-// 100e4 + f24 = 11008 = f2
-// 100ec + f20 = 1100c = f3
-// CHECK-EXIDX-NEXT: 100e4 240f0000 01000000 200f0000 01000000
-// 100f4 + f1c = 11010 = func4
-// 100fc + f18 = 11014 = func5
-// CHECK-EXIDX-NEXT: 100f4 1c0f0000 01000000 180f0000 01000000
-// 10104 + f14 = 11018 = func1
-// 1010c + f10 = 1101c = func2
-// CHECK-EXIDX-NEXT: 10104 140f0000 01000000 100f0000 01000000
-// 10114 + f0c = 11020 = func3
-// CHECK-EXIDX-NEXT: 10114 0c0f0000 01000000
+// 100d4 + 1050 = 11124 = _start
+// 100dc + 104c = 11128 = f1
+// CHECK-EXIDX-NEXT: 100d4 50100000 01000000 4c100000 01000000
+// 100e4 + 1048 = 1112c = f2
+// 100ec + 1044 = 11130 = f3
+// CHECK-EXIDX-NEXT: 100e4 48100000 01000000 44100000 01000000
+// 100f4 + 1040 = 11134 = func4
+// 100fc + 103c = 11138 = func5
+// CHECK-EXIDX-NEXT: 100f4 40100000 01000000 3c100000 01000000
+// 10104 + 1038 = 1113c = func1
+// 1010c + 1034 = 11140 = func2
+// CHECK-EXIDX-NEXT: 10104 38100000 01000000 34100000 01000000
+// 10114 + 1030 = 11144 = func3
+// CHECK-EXIDX-NEXT: 10114 30100000 01000000
// Check that PT_ARM_EXIDX program header has been generated that describes
// the .ARM.exidx output section
Modified: lld/trunk/test/ELF/arm-exidx-shared.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-exidx-shared.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-exidx-shared.s (original)
+++ lld/trunk/test/ELF/arm-exidx-shared.s Tue Aug 27 04:52:36 2019
@@ -38,8 +38,8 @@ __aeabi_unwind_cpp_pr0:
// CHECK: Relocations [
// CHECK-NEXT: Section {{.*}} .rel.plt {
-// CHECK-NEXT: 0x300C R_ARM_JUMP_SLOT __gxx_personality_v0
+// CHECK-NEXT: 0x32DC R_ARM_JUMP_SLOT __gxx_personality_v0
// CHECK-EXTAB: Contents of section .ARM.extab:
-// 0x0238 + 0xdf8 = 0x1030 = __gxx_personality_v0(PLT)
-// CHECK-EXTAB-NEXT: 0238 f80d0000 b0b0b000 00000000
+// 0x0238 + 0x1038 = 0x1270 = __gxx_personality_v0(PLT)
+// CHECK-EXTAB-NEXT: 0238 38100000 b0b0b000 00000000
Modified: lld/trunk/test/ELF/arm-fpic-got.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-fpic-got.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-fpic-got.s (original)
+++ lld/trunk/test/ELF/arm-fpic-got.s Tue Aug 27 04:52:36 2019
@@ -36,7 +36,7 @@ val:
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x12000
+// CHECK-NEXT: Address: 0x12128
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Link:
@@ -45,7 +45,7 @@ val:
// CHECK-NEXT: EntrySize:
// SYMBOLS: Name: val
-// SYMBOLS-NEXT: Value: 0x13000
+// SYMBOLS-NEXT: Value: 0x1312C
// SYMBOLS-NEXT: Size: 4
// SYMBOLS-NEXT: Binding: Global
// SYMBOLS-NEXT: Type: Object
@@ -55,10 +55,10 @@ val:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
// CODE-NEXT: _start:
-// CODE-NEXT: 11000: ldr r0, [pc, #8]
-// CODE-NEXT: 11004: ldr r0, [pc, r0]
-// CODE-NEXT: 11008: ldr r0, [r0]
-// CODE-NEXT: 1100c: bx lr
+// CODE-NEXT: 11114: ldr r0, [pc, #8]
+// CODE-NEXT: 11118: ldr r0, [pc, r0]
+// CODE-NEXT: 1111c: ldr r0, [r0]
+// CODE-NEXT: 11120: bx lr
// CODE: $d.1:
-// 0x11004 + 0x0ff4 + 8 = 0x12000 = .got
-// CODE-NEXT: 11010: f4 0f 00 00
+// 0x11124 + 0x1008 + 8 = 0x12128 = .got
+// CODE-NEXT: 11124: 08 10 00 00
Modified: lld/trunk/test/ELF/arm-gnu-ifunc-plt.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-gnu-ifunc-plt.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-gnu-ifunc-plt.s (original)
+++ lld/trunk/test/ELF/arm-gnu-ifunc-plt.s Tue Aug 27 04:52:36 2019
@@ -2,83 +2,83 @@
// RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf %S/Inputs/arm-shared.s -o %t1.o
// RUN: ld.lld %t1.o --shared -soname=t.so -o %t.so
// RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf %s -o %t.o
-// RUN: ld.lld --hash-style=sysv %t.so %t.o -o %tout
+// RUN: ld.lld %t.so %t.o -o %tout
// RUN: llvm-objdump -triple=armv7a-linux-gnueabihf -d --no-show-raw-insn %tout | FileCheck %s --check-prefix=DISASM
// RUN: llvm-objdump -s %tout | FileCheck %s --check-prefix=GOTPLT
// RUN: llvm-readobj -r --dynamic-table %tout | FileCheck %s
// Check that the IRELATIVE relocations are last in the .got
// CHECK: Relocations [
-// CHECK-NEXT: Section (4) .rel.dyn {
-// CHECK-NEXT: 0x12078 R_ARM_GLOB_DAT bar2 0x0
-// CHECK-NEXT: 0x1207C R_ARM_GLOB_DAT zed2 0x0
-// CHECK-NEXT: 0x12080 R_ARM_IRELATIVE - 0x0
-// CHECK-NEXT: 0x12084 R_ARM_IRELATIVE - 0x0
+// CHECK-NEXT: Section (5) .rel.dyn {
+// CHECK-NEXT: 0x122E0 R_ARM_GLOB_DAT bar2 0x0
+// CHECK-NEXT: 0x122E4 R_ARM_GLOB_DAT zed2 0x0
+// CHECK-NEXT: 0x122E8 R_ARM_IRELATIVE - 0x0
+// CHECK-NEXT: 0x122EC R_ARM_IRELATIVE - 0x0
// CHECK-NEXT: }
-// CHECK-NEXT: Section (5) .rel.plt {
-// CHECK-NEXT: 0x1300C R_ARM_JUMP_SLOT bar2 0x0
-// CHECK-NEXT: 0x13010 R_ARM_JUMP_SLOT zed2 0x0
+// CHECK-NEXT: Section (6) .rel.plt {
+// CHECK-NEXT: 0x132FC R_ARM_JUMP_SLOT bar2 0x0
+// CHECK-NEXT: 0x13300 R_ARM_JUMP_SLOT zed2 0x0
// CHECK-NEXT: }
// CHECK-NEXT: ]
// Check that the GOT entries refer back to the ifunc resolver
// GOTPLT: Contents of section .got:
-// GOTPLT-NEXT: 12078 00000000 00000000 00100100 04100100
+// GOTPLT-NEXT: 122e0 00000000 00000000 dc110100 e0110100
// GOTPLT: Contents of section .got.plt:
-// GOTPLT-NEXT: 13000 00000000 00000000 00000000 20100100
-// GOTPLT-NEXT: 13010 20100100
+// GOTPLT-NEXT: 132f0 00000000 00000000 00000000 00120100
+// GOTPLT-NEXT: 13300 00120100
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
// DISASM-NEXT: foo:
-// DISASM-NEXT: 11000: bx lr
+// DISASM-NEXT: 111dc: bx lr
// DISASM: bar:
-// DISASM-NEXT: 11004: bx lr
+// DISASM-NEXT: 111e0: bx lr
// DISASM: _start:
-// DISASM-NEXT: 11008: bl #80
-// DISASM-NEXT: 1100c: bl #92
+// DISASM-NEXT: 111e4: bl #84
+// DISASM-NEXT: 111e8: bl #96
// DISASM: $d.1:
-// DISASM-NEXT: 11010: 00 00 00 00 .word 0x00000000
-// DISASM-NEXT: 11014: 04 00 00 00 .word 0x00000004
-// DISASM: 11018: bl #32
-// DISASM-NEXT: 1101c: bl #44
+// DISASM-NEXT: 111ec: 00 00 00 00 .word 0x00000000
+// DISASM-NEXT: 111f0: 04 00 00 00 .word 0x00000004
+// DISASM: 111f4: bl #36
+// DISASM-NEXT: 111f8: bl #48
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
// DISASM-NEXT: $a:
-// DISASM-NEXT: 11020: str lr, [sp, #-4]!
-// DISASM-NEXT: 11024: add lr, pc, #0, #12
-// DISASM-NEXT: 11028: add lr, lr, #4096
-// DISASM-NEXT: 1102c: ldr pc, [lr, #4060]!
+// DISASM-NEXT: 11200: str lr, [sp, #-4]!
+// DISASM-NEXT: 11204: add lr, pc, #0, #12
+// DISASM-NEXT: 11208: add lr, lr, #8192
+// DISASM-NEXT: 1120c: ldr pc, [lr, #236]!
// DISASM: $d:
-// DISASM-NEXT: 11030: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM-NEXT: 11034: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM-NEXT: 11038: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM-NEXT: 1103c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 11210: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 11214: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 11218: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 1121c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM: $a:
-// DISASM-NEXT: 11040: add r12, pc, #0, #12
-// DISASM-NEXT: 11044: add r12, r12, #4096
-// DISASM-NEXT: 11048: ldr pc, [r12, #4036]!
+// DISASM-NEXT: 11220: add r12, pc, #0, #12
+// DISASM-NEXT: 11224: add r12, r12, #8192
+// DISASM-NEXT: 11228: ldr pc, [r12, #212]!
// DISASM: $d:
-// DISASM-NEXT: 1104c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 1122c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM: $a:
-// DISASM-NEXT: 11050: add r12, pc, #0, #12
-// DISASM-NEXT: 11054: add r12, r12, #4096
-// DISASM-NEXT: 11058: ldr pc, [r12, #4024]!
+// DISASM-NEXT: 11230: add r12, pc, #0, #12
+// DISASM-NEXT: 11234: add r12, r12, #8192
+// DISASM-NEXT: 11238: ldr pc, [r12, #200]!
// DISASM: $d:
-// DISASM-NEXT: 1105c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 1123c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM: $a:
-// DISASM-NEXT: 11060: add r12, pc, #0, #12
-// DISASM-NEXT: 11064: add r12, r12, #4096
-// DISASM-NEXT: 11068: ldr pc, [r12, #24]!
+// DISASM-NEXT: 11240: add r12, pc, #0, #12
+// DISASM-NEXT: 11244: add r12, r12, #4096
+// DISASM-NEXT: 11248: ldr pc, [r12, #160]!
// DISASM: $d:
-// DISASM-NEXT: 1106c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 1124c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM: $a:
-// DISASM-NEXT: 11070: add r12, pc, #0, #12
-// DISASM-NEXT: 11074: add r12, r12, #4096
-// DISASM-NEXT: 11078: ldr pc, [r12, #12]!
+// DISASM-NEXT: 11250: add r12, pc, #0, #12
+// DISASM-NEXT: 11254: add r12, r12, #4096
+// DISASM-NEXT: 11258: ldr pc, [r12, #148]!
// DISASM: $d:
-// DISASM-NEXT: 1107c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 1125c: d4 d4 d4 d4 .word 0xd4d4d4d4
.syntax unified
.text
Modified: lld/trunk/test/ELF/arm-gnu-ifunc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-gnu-ifunc.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-gnu-ifunc.s (original)
+++ lld/trunk/test/ELF/arm-gnu-ifunc.s Tue Aug 27 04:52:36 2019
@@ -43,8 +43,8 @@ _start:
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_EXECINSTR
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x11020
-// CHECK-NEXT: Offset: 0x1020
+// CHECK-NEXT: Address: 0x11130
+// CHECK-NEXT: Offset: 0x130
// CHECK-NEXT: Size: 32
// CHECK: Index: 4
// CHECK-NEXT: Name: .got
@@ -53,13 +53,13 @@ _start:
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x12000
-// CHECK-NEXT: Offset: 0x2000
+// CHECK-NEXT: Address: 0x12150
+// CHECK-NEXT: Offset: 0x150
// CHECK-NEXT: Size: 8
// CHECK: Relocations [
// CHECK-NEXT: Section (1) .rel.dyn {
-// CHECK-NEXT: 0x12000 R_ARM_IRELATIVE
-// CHECK-NEXT: 0x12004 R_ARM_IRELATIVE
+// CHECK-NEXT: 0x12150 R_ARM_IRELATIVE
+// CHECK-NEXT: 0x12154 R_ARM_IRELATIVE
// CHECK-NEXT: }
// CHECK-NEXT: ]
// CHECK: Symbol {
@@ -86,7 +86,7 @@ _start:
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: _start
-// CHECK-NEXT: Value: 0x11008
+// CHECK-NEXT: Value: 0x1110C
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: None
@@ -95,7 +95,7 @@ _start:
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: bar
-// CHECK-NEXT: Value: 0x11004
+// CHECK-NEXT: Value: 0x11108
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: GNU_IFunc
@@ -104,7 +104,7 @@ _start:
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: foo
-// CHECK-NEXT: Value: 0x11000
+// CHECK-NEXT: Value: 0x11104
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: GNU_IFunc
@@ -115,31 +115,31 @@ _start:
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
// DISASM-NEXT: foo:
-// DISASM-NEXT: 11000: bx lr
+// DISASM-NEXT: 11104: bx lr
// DISASM: bar:
-// DISASM-NEXT: 11004: bx lr
+// DISASM-NEXT: 11108: bx lr
// DISASM: _start:
-// DISASM-NEXT: 11008: bl #16
-// DISASM-NEXT: 1100c: bl #28
+// DISASM-NEXT: 1110c: bl #28
+// DISASM-NEXT: 11110: bl #40
// 1 * 65536 + 244 = 0x100f4 __rel_iplt_start
-// DISASM-NEXT: 11010: movw r0, #244
-// DISASM-NEXT: 11014: movt r0, #1
+// DISASM-NEXT: 11114: movw r0, #244
+// DISASM-NEXT: 11118: movt r0, #1
// 1 * 65536 + 260 = 0x10104 __rel_iplt_end
-// DISASM-NEXT: 11018: movw r0, #260
-// DISASM-NEXT: 1101c: movt r0, #1
+// DISASM-NEXT: 1111c: movw r0, #260
+// DISASM-NEXT: 11120: movt r0, #1
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
// DISASM-NEXT: $a:
-// DISASM-NEXT: 11020: add r12, pc, #0, #12
-// DISASM-NEXT: 11024: add r12, r12, #0, #20
-// DISASM-NEXT: 11028: ldr pc, [r12, #4056]!
+// DISASM-NEXT: 11130: add r12, pc, #0, #12
+// DISASM-NEXT: 11134: add r12, r12, #4096
+// DISASM-NEXT: 11138: ldr pc, [r12, #24]!
// DISASM: $d:
-// DISASM-NEXT: 1102c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 1113c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM: $a:
-// DISASM-NEXT: 11030: add r12, pc, #0, #12
-// DISASM-NEXT: 11034: add r12, r12, #0, #20
-// DISASM-NEXT: 11038: ldr pc, [r12, #4044]!
+// DISASM-NEXT: 11140: add r12, pc, #0, #12
+// DISASM-NEXT: 11144: add r12, r12, #4096
+// DISASM-NEXT: 11148: ldr pc, [r12, #12]!
// DISASM: $d:
-// DISASM-NEXT: 1103c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 1114c: d4 d4 d4 d4 .word 0xd4d4d4d4
Modified: lld/trunk/test/ELF/arm-got-relative.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-got-relative.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-got-relative.s (original)
+++ lld/trunk/test/ELF/arm-got-relative.s Tue Aug 27 04:52:36 2019
@@ -1,6 +1,6 @@
// REQUIRES: arm
// RUN: llvm-mc -position-independent -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t.o
-// RUN: ld.lld --hash-style=sysv %t.o -shared -o %t
+// RUN: ld.lld %t.o -shared -o %t
// RUN: llvm-readobj -S --symbols --dyn-relocations %t | FileCheck %s
// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t | FileCheck -check-prefix=CODE %s
.syntax unified
@@ -28,10 +28,10 @@ function:
bx lr
// CHECK: Dynamic Relocations {
-// CHECK-NEXT: 0x2048 R_ARM_GLOB_DAT function 0x0
+// CHECK-NEXT: 0x220C R_ARM_GLOB_DAT function 0x0
// CHECK: Name: _GLOBAL_OFFSET_TABLE_
-// CHECK-NEXT: Value: 0x2048
+// CHECK-NEXT: Value: 0x220C
// CHECK-NEXT: Size:
// CHECK-NEXT: Binding: Local
// CHECK-NEXT: Type: None
@@ -43,12 +43,12 @@ function:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
// CODE-NEXT: _start:
-// CODE-NEXT: 1000: 08 30 9f e5 ldr r3, [pc, #8]
-// CODE-NEXT: 1004: 08 20 9f e5 ldr r2, [pc, #8]
-// CODE-NEXT: 1008: 03 00 8f e0 add r0, pc, r3
-// CODE-NEXT: 100c: 1e ff 2f e1 bx lr
+// CODE-NEXT: 11a0: 08 30 9f e5 ldr r3, [pc, #8]
+// CODE-NEXT: 11a4: 08 20 9f e5 ldr r2, [pc, #8]
+// CODE-NEXT: 11a8: 03 00 8f e0 add r0, pc, r3
+// CODE-NEXT: 11ac: 1e ff 2f e1 bx lr
// CODE:$d.1:
-// (_GLOBAL_OFFSET_TABLE_ = 0x2048) - (0x1008 + 8) 0x1038
-// CODE-NEXT: 1010: 38 10 00 00
+// (_GLOBAL_OFFSET_TABLE_ = 0x220c) - (0x11a8 + 8) = 0x105c
+// CODE-NEXT: 11b0: 5c 10 00 00
// (Got(function) - GotBase = 0x0
-// CODE-NEXT: 1014: 00 00 00 00
+// CODE-NEXT: 11b4: 00 00 00 00
Modified: lld/trunk/test/ELF/arm-gotoff.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-gotoff.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-gotoff.s (original)
+++ lld/trunk/test/ELF/arm-gotoff.s Tue Aug 27 04:52:36 2019
@@ -12,8 +12,8 @@
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x12000
-// CHECK-NEXT: Offset: 0x2000
+// CHECK-NEXT: Address: 0x12124
+// CHECK-NEXT: Offset: 0x124
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Link:
// CHECK-NEXT: Info:
@@ -25,7 +25,7 @@
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x12000
+// CHECK-NEXT: Address: 0x13124
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 20
// CHECK-NEXT: Link:
@@ -36,7 +36,7 @@
// CHECK: Symbol {
// CHECK: Name: bar
-// CHECK-NEXT: Value: 0x12000
+// CHECK-NEXT: Value: 0x13124
// CHECK-NEXT: Size: 10
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
@@ -45,7 +45,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: obj
-// CHECK-NEXT: Value: 0x1200A
+// CHECK-NEXT: Value: 0x1312E
// CHECK-NEXT: Size: 10
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
@@ -55,13 +55,13 @@
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
// DISASM-NEXT :_start:
-// DISASM-NEXT 11000: 1e ff 2f e1 bx lr
+// DISASM-NEXT 11114: 1e ff 2f e1 bx lr
// Offset 0 from .got = bar
-// DISASM 11004: 00 00 00 00
+// DISASM 11118: 00 10 00 00
// Offset 10 from .got = obj
-// DISASM-NEXT 11008: 0a 00 00 00
+// DISASM-NEXT 1111c: 0a 10 00 00
// Offset 15 from .got = obj +5
-// DISASM-NEXT 1100c: 0f 00 00 00
+// DISASM-NEXT 11120: 0f 10 00 00
.syntax unified
.globl _start
_start:
Modified: lld/trunk/test/ELF/arm-icf-exidx.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-icf-exidx.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-icf-exidx.s (original)
+++ lld/trunk/test/ELF/arm-icf-exidx.s Tue Aug 27 04:52:36 2019
@@ -25,10 +25,10 @@ __aeabi_unwind_cpp_pr0:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: g:
-// CHECK-NEXT: 11000: 1e ff 2f e1 bx lr
+// CHECK-NEXT: 110ec: 1e ff 2f e1 bx lr
// CHECK: __aeabi_unwind_cpp_pr0:
-// CHECK-NEXT: 11004: 00 f0 20 e3 nop
-// CHECK-NEXT: 11008: 1e ff 2f e1 bx lr
+// CHECK-NEXT: 110f0: 00 f0 20 e3 nop
+// CHECK-NEXT: 110f4: 1e ff 2f e1 bx lr
// CHECK: Contents of section .ARM.exidx:
-// CHECK-NEXT: 100d4 2c0f0000 b0b0b080 280f0000 01000000
+// CHECK-NEXT: 100d4 18100000 b0b0b080 14100000 01000000
Modified: lld/trunk/test/ELF/arm-mov-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-mov-relocs.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-mov-relocs.s (original)
+++ lld/trunk/test/ELF/arm-mov-relocs.s Tue Aug 27 04:52:36 2019
@@ -44,33 +44,33 @@ _start:
movw r2, :lower16:label2 + 4 - .
movw r3, :lower16:label3 - .
movw r4, :lower16:label3 + 0x103c - .
-// 0x20000 - 0x11028 = :lower16:0xefd8 (61400)
-// CHECK: 11028: movw r0, #61400
-// 0x20004 = 0x1102c = :lower16:0xefd8 (61400)
-// CHECK: 1102c: movw r1, #61400
-// 0x20008 - 0x11030 + 4 = :lower16:0xefdc (61404)
-// CHECK: 11030: movw r2, #61404
-// 0x2fffc - 0x11034 = :lower16:0x1efc8 (61384)
-// CHECK: 11034: movw r3, #61384
-// 0x2fffc - 0x11038 +0x103c :lower16:0x20000 (0)
-// CHECK: 11038: movw r4, #0
+// 0x20000 - . = 61188
+// CHECK: 110fc: movw r0, #61188
+// 0x20004 - . = 61188
+// CHECK: 11100: movw r1, #61188
+// 0x20008 - . + 4 = 61192
+// CHECK: 11104: movw r2, #61192
+// 0x2fffc - . = 61172
+// CHECK: 11108: movw r3, #61172
+// 0x2fffc - . +0x103c = 65324
+// CHECK: 1110c: movw r4, #65324
.section .R_ARM_MOVT_PREL, "ax",%progbits
movt r0, :upper16:label - .
movt r1, :upper16:label1 - .
movt r2, :upper16:label2 + 0x4 - .
movt r3, :upper16:label3 - .
- movt r4, :upper16:label3 + 0x1050 - .
-// 0x20000 - 0x1103c = :upper16:0xefc4 = 0
-// CHECK: 1103c: movt r0, #0
-// 0x20004 - 0x11040 = :upper16:0xefc0 = 0
-// CHECK: 11040: movt r1, #0
-// 0x20008 - 0x11044 + 4 = :upper16:0xefc8 = 0
-// CHECK: 11044: movt r2, #0
-// 0x2fffc - 0x11048 = :upper16:0x1efb4 = 1
-// CHECK: 11048: movt r3, #1
-// 0x2fffc - 0x1104c + 0x1050 = :upper16:0x20000 = 2
-// CHECK: 1104c: movt r4, #2
+ movt r4, :upper16:label3 + 0x1120 - .
+// 0x20000 - . = :upper16:0xeef0 = 0
+// CHECK: 11110: movt r0, #0
+// 0x20004 - . = :upper16:0xeef0 = 0
+// CHECK: 11114: movt r1, #0
+// 0x20008 - . + 4 = :upper16:0xeef4 = 0
+// CHECK: 11118: movt r2, #0
+// 0x2fffc - . = :upper16:0x1eee0 = 1
+// CHECK: 1111c: movt r3, #1
+// 0x2fffc - . + 0x1120 = :upper16:0x20000 = 2
+// CHECK: 11120: movt r4, #1
.section .destination, "aw",%progbits
.balign 65536
// 0x20000
Modified: lld/trunk/test/ELF/arm-pie-relative.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-pie-relative.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-pie-relative.s (original)
+++ lld/trunk/test/ELF/arm-pie-relative.s Tue Aug 27 04:52:36 2019
@@ -1,6 +1,6 @@
// REQUIRES: arm
// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t.o
-// RUN: ld.lld --hash-style=sysv %t.o --pie -o %t
+// RUN: ld.lld %t.o --pie -o %t
// RUN: llvm-readobj -r %t | FileCheck %s
// RUN: llvm-readelf -x .got %t | FileCheck %s --check-prefix=GOT
@@ -18,8 +18,8 @@ sym:
.word 0
// CHECK: Relocations [
-// CHECK-NEXT: Section (4) .rel.dyn {
-// CHECK-NEXT: 0x2058 R_ARM_RELATIVE
+// CHECK-NEXT: Section (5) .rel.dyn {
+// CHECK-NEXT: 0x21DC R_ARM_RELATIVE
-// GOT: section '.got':
-// GOT-NEXT: 2058 00300000
+// GOT: section '.got':
+// GOT-NEXT: 0x000021dc e0310000
Modified: lld/trunk/test/ELF/arm-plt-reloc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-plt-reloc.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-plt-reloc.s (original)
+++ lld/trunk/test/ELF/arm-plt-reloc.s Tue Aug 27 04:52:36 2019
@@ -3,7 +3,7 @@
// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t2
// RUN: ld.lld %t1 %t2 -o %t
// RUN: llvm-objdump -triple=armv7a-none-linux-gnueabi -d --no-show-raw-insn %t | FileCheck %s
-// RUN: ld.lld --hash-style=sysv -shared %t1 %t2 -o %t3
+// RUN: ld.lld -shared %t1 %t2 -o %t3
// RUN: llvm-objdump -triple=armv7a-none-linux-gnueabi -d --no-show-raw-insn %t3 | FileCheck -check-prefix=DSO %s
// RUN: llvm-readobj -S -r %t3 | FileCheck -check-prefix=DSOREL %s
//
@@ -22,68 +22,68 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: func1:
-// CHECK-NEXT: 11000: bx lr
+// CHECK-NEXT: 110b4: bx lr
// CHECK: func2:
-// CHECK-NEXT: 11004: bx lr
+// CHECK-NEXT: 110b8: bx lr
// CHECK: func3:
-// CHECK-NEXT: 11008: bx lr
+// CHECK-NEXT: 110bc: bx lr
// CHECK: _start:
-// CHECK-NEXT: 1100c: b #-20 <func1>
-// CHECK-NEXT: 11010: bl #-20 <func2>
-// CHECK-NEXT: 11014: beq #-20 <func3>
+// CHECK-NEXT: 110c0: b #-20 <func1>
+// CHECK-NEXT: 110c4: bl #-20 <func2>
+// CHECK-NEXT: 110c8: beq #-20 <func3>
// Expect PLT entries as symbols can be preempted
// The .got.plt and .plt displacement is small so we can use small PLT entries.
// DSO: Disassembly of section .text:
// DSO-EMPTY:
// DSO-NEXT: func1:
-// DSO-NEXT: 1000: bx lr
+// DSO-NEXT: 1214: bx lr
// DSO: func2:
-// DSO-NEXT: 1004: bx lr
+// DSO-NEXT: 1218: bx lr
// DSO: func3:
-// DSO-NEXT: 1008: bx lr
+// DSO-NEXT: 121c: bx lr
// DSO: _start:
-// S(0x1040) - P(0x100c) + A(-8) = 0x2c = 32
-// DSO-NEXT: 100c: b #44
-// S(0x1050) - P(0x1010) + A(-8) = 0x38 = 56
-// DSO-NEXT: 1010: bl #56
-// S(0x10160) - P(0x1014) + A(-8) = 0x44 = 68
-// DSO-NEXT: 1014: beq #68
+// S(0x1214) - P(0x1220) + A(-8) = 0x2c = 32
+// DSO-NEXT: 1220: b #40
+// S(0x1218) - P(0x1224) + A(-8) = 0x38 = 56
+// DSO-NEXT: 1224: bl #52
+// S(0x121c) - P(0x1228) + A(-8) = 0x44 = 68
+// DSO-NEXT: 1228: beq #64
// DSO-EMPTY:
// DSO-NEXT: Disassembly of section .plt:
// DSO-EMPTY:
// DSO-NEXT: $a:
-// DSO-NEXT: 1020: str lr, [sp, #-4]!
-// (0x1024 + 8) + (0 RoR 12) + 4096 + (0xfdc) = 0x3008 = .got.plt[3]
-// DSO-NEXT: 1024: add lr, pc, #0, #12
-// DSO-NEXT: 1028: add lr, lr, #4096
-// DSO-NEXT: 102c: ldr pc, [lr, #4060]!
+// DSO-NEXT: 1230: str lr, [sp, #-4]!
+// (0x1234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[2]
+// DSO-NEXT: 1234: add lr, pc, #0, #12
+// DSO-NEXT: 1238: add lr, lr, #8192
+// DSO-NEXT: 123c: ldr pc, [lr, #164]!
// DSO: $d:
-// DSO-NEXT: 1030: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 1034: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 1038: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 103c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1240: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1244: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1248: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: $a:
-// (0x1040 + 8) + (0 RoR 12) + 4096 + (0xfc4) = 0x300c
-// DSO-NEXT: 1040: add r12, pc, #0, #12
-// DSO-NEXT: 1044: add r12, r12, #4096
-// DSO-NEXT: 1048: ldr pc, [r12, #4036]!
+// (0x1250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4
+// DSO-NEXT: 1250: add r12, pc, #0, #12
+// DSO-NEXT: 1254: add r12, r12, #8192
+// DSO-NEXT: 1258: ldr pc, [r12, #140]!
// DSO: $d:
-// DSO-NEXT: 104c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 125c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: $a:
-// (0x1050 + 8) + (0 RoR 12) + 4096 + (0xfb8) = 0x3010
-// DSO-NEXT: 1050: add r12, pc, #0, #12
-// DSO-NEXT: 1054: add r12, r12, #4096
-// DSO-NEXT: 1058: ldr pc, [r12, #4024]!
+// (0x1260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8
+// DSO-NEXT: 1260: add r12, pc, #0, #12
+// DSO-NEXT: 1264: add r12, r12, #8192
+// DSO-NEXT: 1268: ldr pc, [r12, #128]!
// DSO: $d:
-// DSO-NEXT: 105c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 126c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: $a:
-// (0x1060 + 8) + (0 RoR 12) + 4096 + (0xfac) = 0x3014
-// DSO-NEXT: 1060: add r12, pc, #0, #12
-// DSO-NEXT: 1064: add r12, r12, #4096
-// DSO-NEXT: 1068: ldr pc, [r12, #4012]!
+// (0x1270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec
+// DSO-NEXT: 1270: add r12, pc, #0, #12
+// DSO-NEXT: 1274: add r12, r12, #8192
+// DSO-NEXT: 1278: ldr pc, [r12, #116]!
// DSO: $d:
-// DSO-NEXT: 106c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 127c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSOREL: Name: .got.plt
@@ -92,7 +92,7 @@ _start:
// DSOREL-NEXT: SHF_ALLOC
// DSOREL-NEXT: SHF_WRITE
// DSOREL-NEXT: ]
-// DSOREL-NEXT: Address: 0x3000
+// DSOREL-NEXT: Address: 0x32D8
// DSOREL-NEXT: Offset:
// DSOREL-NEXT: Size: 24
// DSOREL-NEXT: Link:
@@ -101,9 +101,9 @@ _start:
// DSOREL-NEXT: EntrySize:
// DSOREL: Relocations [
// DSOREL-NEXT: Section {{.*}} .rel.plt {
-// DSOREL-NEXT: 0x300C R_ARM_JUMP_SLOT func1 0x0
-// DSOREL-NEXT: 0x3010 R_ARM_JUMP_SLOT func2 0x0
-// DSOREL-NEXT: 0x3014 R_ARM_JUMP_SLOT func3 0x0
+// DSOREL-NEXT: 0x32E4 R_ARM_JUMP_SLOT func1 0x0
+// DSOREL-NEXT: 0x32E8 R_ARM_JUMP_SLOT func2 0x0
+// DSOREL-NEXT: 0x32EC R_ARM_JUMP_SLOT func3 0x0
// Test a large separation between the .plt and .got.plt
// The .got.plt and .plt displacement is large but still within the range
Modified: lld/trunk/test/ELF/arm-sbrel32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-sbrel32.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-sbrel32.s (original)
+++ lld/trunk/test/ELF/arm-sbrel32.s Tue Aug 27 04:52:36 2019
@@ -33,8 +33,8 @@ foo4: .space 4
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: _start:
-// CHECK-NEXT: 1e ff 2f e1 bx lr
-// CHECK: 00 00 00 00 .word 0x00000000
-// CHECK-NEXT: 04 00 00 00 .word 0x00000004
-// CHECK-NEXT: 08 00 00 00 .word 0x00000008
-// CHECK-NEXT: 0c 00 00 00 .word 0x0000000c
+// CHECK-NEXT: 110d4: 1e ff 2f e1 bx lr
+// CHECK: 110d8: 00 00 00 00 .word 0x00000000
+// CHECK-NEXT: 110dc: 04 00 00 00 .word 0x00000004
+// CHECK-NEXT: 110e0: 08 00 00 00 .word 0x00000008
+// CHECK-NEXT: 110e4: 0c 00 00 00 .word 0x0000000c
Modified: lld/trunk/test/ELF/arm-target1.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-target1.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-target1.s (original)
+++ lld/trunk/test/ELF/arm-target1.s Tue Aug 27 04:52:36 2019
@@ -28,9 +28,9 @@
// RELATIVE: Disassembly of section .text:
// RELATIVE-EMPTY:
// RELATIVE: $d.0:
-// RELATIVE: 1000: 04 00 00 00 .word 0x00000004
+// RELATIVE: 1150: 04 00 00 00 .word 0x00000004
// RELATIVE: SYMBOL TABLE:
-// RELATIVE: 00001004 .text 00000000 patatino
+// RELATIVE: 00001154 .text 00000000 patatino
// ABS: can't create dynamic relocation R_ARM_TARGET1 against symbol: patatino in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output
// ABS: >>> defined in {{.*}}.o
Modified: lld/trunk/test/ELF/arm-target2.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-target2.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-target2.s (original)
+++ lld/trunk/test/ELF/arm-target2.s Tue Aug 27 04:52:36 2019
@@ -35,16 +35,16 @@ __gxx_personality_v0:
_ZTIi: .word 0
// CHECK: Contents of section .ARM.extab:
-// 0x1012c + 0x1ed4 = 0x12000 = .got
-// CHECK-NEXT: 10124 e00e0000 b0b0b000 d41e0000
+// 0x1012c + 0x2010 = 0x1213c = .got
+// CHECK-NEXT: 10124 14100000 b0b0b000 10200000
// CHECK-ABS: Contents of section .ARM.extab:
// 0x100f0 = .rodata
-// CHECK-ABS-NEXT: 100e4 200f0000 b0b0b000 f0000100
+// CHECK-ABS-NEXT: 100e4 14100000 b0b0b000 f0000100
// CHECK-REL: Contents of section .ARM.extab:
// 0x100ec + 4 = 0x100f0 = .rodata
-// CHECK-REL-NEXT: 100e4 200f0000 b0b0b000 04000000
+// CHECK-REL-NEXT: 100e4 14100000 b0b0b000 04000000
// CHECK: Contents of section .rodata:
// CHECK-NEXT: 10130 00000000
@@ -57,4 +57,4 @@ _ZTIi: .word 0
// CHECK: Contents of section .got:
// 10130 = _ZTIi
-// CHECK-NEXT: 12000 30010100
+// CHECK-NEXT: 1213c 30010100
Modified: lld/trunk/test/ELF/arm-thumb-interwork-shared.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thumb-interwork-shared.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thumb-interwork-shared.s (original)
+++ lld/trunk/test/ELF/arm-thumb-interwork-shared.s Tue Aug 27 04:52:36 2019
@@ -16,40 +16,40 @@ sym1:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: sym1:
-// CHECK-NEXT: 1000: 00 f0 02 b8 b.w #4 <__ThumbV7PILongThunk_elsewhere>
-// CHECK-NEXT: 1004: 00 f0 06 b8 b.w #12 <__ThumbV7PILongThunk_weakref>
+// CHECK-NEXT: 11e0: 00 f0 02 b8 b.w #4 <__ThumbV7PILongThunk_elsewhere>
+// CHECK-NEXT: 11e4: 00 f0 06 b8 b.w #12 <__ThumbV7PILongThunk_weakref>
// CHECK: __ThumbV7PILongThunk_elsewhere:
-// CHECK-NEXT: 1008: 40 f2 2c 0c movw r12, #44
-// CHECK-NEXT: 100c: c0 f2 00 0c movt r12, #0
-// CHECK-NEXT: 1010: fc 44 add r12, pc
-// CHECK-NEXT: 1012: 60 47 bx r12
+// CHECK-NEXT: 11e8: 40 f2 2c 0c movw r12, #44
+// CHECK-NEXT: 11ec: c0 f2 00 0c movt r12, #0
+// CHECK-NEXT: 11f0: fc 44 add r12, pc
+// CHECK-NEXT: 11f2: 60 47 bx r12
// CHECK: __ThumbV7PILongThunk_weakref:
-// CHECK-NEXT: 1014: 40 f2 30 0c movw r12, #48
-// CHECK-NEXT: 1018: c0 f2 00 0c movt r12, #0
-// CHECK-NEXT: 101c: fc 44 add r12, pc
-// CHECK-NEXT: 101e: 60 47 bx r12
+// CHECK-NEXT: 11f4: 40 f2 30 0c movw r12, #48
+// CHECK-NEXT: 11f8: c0 f2 00 0c movt r12, #0
+// CHECK-NEXT: 11fc: fc 44 add r12, pc
+// CHECK-NEXT: 11fe: 60 47 bx r12
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
// CHECK-NEXT: $a:
-// CHECK-NEXT: 1020: 04 e0 2d e5 str lr, [sp, #-4]!
-// CHECK-NEXT: 1024: 00 e6 8f e2 add lr, pc, #0, #12
-// CHECK-NEXT: 1028: 01 ea 8e e2 add lr, lr, #4096
-// CHECK-NEXT: 102c: dc ff be e5 ldr pc, [lr, #4060]!
+// CHECK-NEXT: 1200: 04 e0 2d e5 str lr, [sp, #-4]!
+// CHECK-NEXT: 1204: 00 e6 8f e2 add lr, pc, #0, #12
+// CHECK-NEXT: 1208: 02 ea 8e e2 add lr, lr, #8192
+// CHECK-NEXT: 120c: 94 f0 be e5 ldr pc, [lr, #148]!
// CHECK: $d:
-// CHECK-NEXT: 1030: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-NEXT: 1034: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-NEXT: 1038: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-NEXT: 103c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-NEXT: 1210: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-NEXT: 1214: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-NEXT: 1218: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-NEXT: 121c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK: $a:
-// CHECK-NEXT: 1040: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK-NEXT: 1044: 01 ca 8c e2 add r12, r12, #4096
-// CHECK-NEXT: 1048: c4 ff bc e5 ldr pc, [r12, #4036]!
+// CHECK-NEXT: 1220: 00 c6 8f e2 add r12, pc, #0, #12
+// CHECK-NEXT: 1224: 02 ca 8c e2 add r12, r12, #8192
+// CHECK-NEXT: 1228: 7c f0 bc e5 ldr pc, [r12, #124]!
// CHECK: $d:
-// CHECK-NEXT: 104c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-NEXT: 122c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK: $a:
-// CHECK-NEXT: 1050: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK-NEXT: 1054: 01 ca 8c e2 add r12, r12, #4096
-// CHECK-NEXT: 1058: b8 ff bc e5 ldr pc, [r12, #4024]!
+// CHECK-NEXT: 1230: 00 c6 8f e2 add r12, pc, #0, #12
+// CHECK-NEXT: 1234: 02 ca 8c e2 add r12, r12, #8192
+// CHECK-NEXT: 1238: 70 f0 bc e5 ldr pc, [r12, #112]!
// CHECK: $d:
-// CHECK-NEXT: 105c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-NEXT: 123c: d4 d4 d4 d4 .word 0xd4d4d4d4
Modified: lld/trunk/test/ELF/arm-thumb-interwork-thunk-v5.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thumb-interwork-thunk-v5.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thumb-interwork-thunk-v5.s (original)
+++ lld/trunk/test/ELF/arm-thumb-interwork-thunk-v5.s Tue Aug 27 04:52:36 2019
@@ -27,34 +27,34 @@ _start:
bx lr
// CHECK: _start:
-// CHECK-NEXT: 11000: 03 00 00 ea b #12 <__ARMv5ABSLongThunk_thumb_func>
-// CHECK-NEXT: 11004: 01 00 00 fa blx #4 <thumb_func>
-// CHECK-NEXT: 11008: 00 00 00 fa blx #0 <thumb_func>
-// CHECK-NEXT: 1100c: 1e ff 2f e1 bx lr
+// CHECK-NEXT: 12000: 03 00 00 ea b #12 <__ARMv5ABSLongThunk_thumb_func>
+// CHECK-NEXT: 12004: 01 00 00 fa blx #4 <thumb_func>
+// CHECK-NEXT: 12008: 00 00 00 fa blx #0 <thumb_func>
+// CHECK-NEXT: 1200c: 1e ff 2f e1 bx lr
// CHECK: thumb_func:
-// CHECK-NEXT: 11010: 70 47 bx lr
+// CHECK-NEXT: 12010: 70 47 bx lr
// CHECK: __ARMv5ABSLongThunk_thumb_func:
-// CHECK-NEXT: 11014: 04 f0 1f e5 ldr pc, [pc, #-4]
+// CHECK-NEXT: 12014: 04 f0 1f e5 ldr pc, [pc, #-4]
// CHECK: $d:
-// CHECK-NEXT: 11018: 11 10 01 00 .word 0x00011011
+// CHECK-NEXT: 12018: 11 20 01 00 .word 0x00012011
// CHECK-PI: _start:
-// CHECK-PI-NEXT: 1000: 03 00 00 ea b #12 <__ARMV5PILongThunk_thumb_func>
-// CHECK-PI-NEXT: 1004: 01 00 00 fa blx #4 <thumb_func>
-// CHECK-PI-NEXT: 1008: 00 00 00 fa blx #0 <thumb_func>
-// CHECK-PI-NEXT: 100c: 1e ff 2f e1 bx lr
+// CHECK-PI-NEXT: 2000: 03 00 00 ea b #12 <__ARMV5PILongThunk_thumb_func>
+// CHECK-PI-NEXT: 2004: 01 00 00 fa blx #4 <thumb_func>
+// CHECK-PI-NEXT: 2008: 00 00 00 fa blx #0 <thumb_func>
+// CHECK-PI-NEXT: 200c: 1e ff 2f e1 bx lr
// CHECK-PI: thumb_func:
-// CHECK-PI-NEXT: 1010: 70 47 bx lr
+// CHECK-PI-NEXT: 2010: 70 47 bx lr
// CHECK-PI: __ARMV5PILongThunk_thumb_func:
-// CHECK-PI-NEXT: 1014: 04 c0 9f e5 ldr r12, [pc, #4]
-// CHECK-PI-NEXT: 1018: 0c c0 8f e0 add r12, pc, r12
-// CHECK-PI-NEXT: 101c: 1c ff 2f e1 bx r12
+// CHECK-PI-NEXT: 2014: 04 c0 9f e5 ldr r12, [pc, #4]
+// CHECK-PI-NEXT: 2018: 0c c0 8f e0 add r12, pc, r12
+// CHECK-PI-NEXT: 201c: 1c ff 2f e1 bx r12
// CHECK-PI: $d:
-// CHECK-PI-NEXT: 1020: f1 ff ff ff .word 0xfffffff1
+// CHECK-PI-NEXT: 2020: f1 ff ff ff .word 0xfffffff1
.section .text.1, "ax", %progbits
.thumb
Modified: lld/trunk/test/ELF/arm-thumb-no-undefined-thunk.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thumb-no-undefined-thunk.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thumb-no-undefined-thunk.s (original)
+++ lld/trunk/test/ELF/arm-thumb-no-undefined-thunk.s Tue Aug 27 04:52:36 2019
@@ -19,7 +19,7 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: _start:
-// 69636 = 0x11004 = next instruction
-// CHECK: 11000: {{.*}} bl #0
-// CHECK-NEXT: 11004: {{.*}} b.w #0 <_start+0x8>
-// CHECK-NEXT: 11008: {{.*}} b.w #0 <_start+0xc>
+// 0x110b8 = next instruction
+// CHECK: 110b4: {{.*}} bl #0
+// CHECK-NEXT: 110b8: {{.*}} b.w #0 <_start+0x8>
+// CHECK-NEXT: 110bc: {{.*}} b.w #0 <_start+0xc>
Modified: lld/trunk/test/ELF/arm-thumb-plt-range-thunk-os.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thumb-plt-range-thunk-os.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thumb-plt-range-thunk-os.s (original)
+++ lld/trunk/test/ELF/arm-thumb-plt-range-thunk-os.s Tue Aug 27 04:52:36 2019
@@ -89,8 +89,8 @@ far_nonpreemptible_alias:
// CHECK4-NEXT: $a:
// CHECK4-NEXT: 4000010: 04 e0 2d e5 str lr, [sp, #-4]!
// CHECK4-NEXT: 4000014: 00 e6 8f e2 add lr, pc, #0, #12
-// CHECK4-NEXT: 4000018: 01 ea 8e e2 add lr, lr, #4096
-// CHECK4-NEXT: 400001c: ec ff be e5 ldr pc, [lr, #4076]!
+// CHECK4-NEXT: 4000018: 02 ea 8e e2 add lr, lr, #8192
+// CHECK4-NEXT: 400001c: a4 f0 be e5 ldr pc, [lr, #164]!
// CHECK4: $d:
// CHECK4-NEXT: 4000020: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4-NEXT: 4000024: d4 d4 d4 d4 .word 0xd4d4d4d4
@@ -98,19 +98,19 @@ far_nonpreemptible_alias:
// CHECK4-NEXT: 400002c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4: $a:
// CHECK4-NEXT: 4000030: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK4-NEXT: 4000034: 01 ca 8c e2 add r12, r12, #4096
-// CHECK4-NEXT: 4000038: d4 ff bc e5 ldr pc, [r12, #4052]!
+// CHECK4-NEXT: 4000034: 02 ca 8c e2 add r12, r12, #8192
+// CHECK4-NEXT: 4000038: 8c f0 bc e5 ldr pc, [r12, #140]!
// CHECK4: $d:
// CHECK4-NEXT: 400003c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4: $a:
// CHECK4-NEXT: 4000040: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK4-NEXT: 4000044: 01 ca 8c e2 add r12, r12, #4096
-// CHECK4-NEXT: 4000048: c8 ff bc e5 ldr pc, [r12, #4040]!
+// CHECK4-NEXT: 4000044: 02 ca 8c e2 add r12, r12, #8192
+// CHECK4-NEXT: 4000048: 80 f0 bc e5 ldr pc, [r12, #128]!
// CHECK4: $d:
// CHECK4-NEXT: 400004c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4: $a:
// CHECK4-NEXT: 4000050: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK4-NEXT: 4000054: 01 ca 8c e2 add r12, r12, #4096
-// CHECK4-NEXT: 4000058: bc ff bc e5 ldr pc, [r12, #4028]!
+// CHECK4-NEXT: 4000054: 02 ca 8c e2 add r12, r12, #8192
+// CHECK4-NEXT: 4000058: 74 f0 bc e5 ldr pc, [r12, #116]!
// CHECK4: $d:
// CHECK4-NEXT: 400005c: d4 d4 d4 d4 .word 0xd4d4d4d4
Modified: lld/trunk/test/ELF/arm-thumb-plt-reloc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thumb-plt-reloc.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thumb-plt-reloc.s (original)
+++ lld/trunk/test/ELF/arm-thumb-plt-reloc.s Tue Aug 27 04:52:36 2019
@@ -3,7 +3,7 @@
// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t2
// RUN: ld.lld %t1 %t2 -o %t
// RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t | FileCheck %s
-// RUN: ld.lld --hash-style=sysv -shared %t1 %t2 -o %t.so
+// RUN: ld.lld -shared %t1 %t2 -o %t.so
// RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t.so | FileCheck -check-prefix=DSO %s
// RUN: llvm-readobj -S -r %t.so | FileCheck -check-prefix=DSOREL %s
//
@@ -25,19 +25,19 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: func1:
-// CHECK-NEXT: 11000: 70 47 bx lr
+// CHECK-NEXT: 110b4: 70 47 bx lr
// CHECK: func2:
-// CHECK-NEXT: 11002: 70 47 bx lr
+// CHECK-NEXT: 110b6: 70 47 bx lr
// CHECK: func3:
-// CHECK-NEXT: 11004: 70 47 bx lr
-// CHECK-NEXT: 11006: d4 d4
+// CHECK-NEXT: 110b8: 70 47 bx lr
+// CHECK-NEXT: 110ba: d4 d4
// CHECK: _start:
-// 11008 + 4 -12 = 0x11000 = func1
-// CHECK-NEXT: 11008: ff f7 fa ff bl #-12
-// 1100c + 4 -14 = 0x11002 = func2
-// CHECK-NEXT: 1100c: ff f7 f9 ff bl #-14
-// 11010 + 4 -16 = 0x11004 = func3
-// CHECK-NEXT: 11010: ff f7 f8 ff bl #-16
+// . + 4 -12 = 0x110b4 = func1
+// CHECK-NEXT: 110bc: ff f7 fa ff bl #-12
+// . + 4 -14 = 0x110b6 = func2
+// CHECK-NEXT: 110c0: ff f7 f9 ff bl #-14
+// . + 4 -16 = 0x110b8 = func3
+// CHECK-NEXT: 110c4: ff f7 f8 ff bl #-16
// Expect PLT entries as symbols can be preempted
// .text is Thumb and .plt is ARM, llvm-objdump can currently only disassemble
@@ -45,54 +45,54 @@ _start:
// DSO: Disassembly of section .text:
// DSO-EMPTY:
// DSO-NEXT: func1:
-// DSO-NEXT: 1000: 70 47 bx lr
+// DSO-NEXT: 1214: 70 47 bx lr
// DSO: func2:
-// DSO-NEXT: 1002: 70 47 bx lr
+// DSO-NEXT: 1216: 70 47 bx lr
// DSO: func3:
-// DSO-NEXT: 1004: 70 47 bx lr
-// DSO-NEXT: 1006: d4 d4 bmi #-88
+// DSO-NEXT: 1218: 70 47 bx lr
+// DSO-NEXT: 121a: d4 d4 bmi #-88
// DSO: _start:
-// 0x1008 + 0x34 + 4 = 0x1040 = PLT func1
-// DSO-NEXT: 1008: 00 f0 1a e8 blx #52
-// 0x100c + 0x40 + 4 = 0x1050 = PLT func2
-// DSO-NEXT: 100c: 00 f0 20 e8 blx #64
-// 0x1010 + 0x4C + 4 = 0x1060 = PLT func3
-// DSO-NEXT: 1010: 00 f0 26 e8 blx #76
+// . + 48 + 4 = 0x1250 = PLT func1
+// DSO-NEXT: 121c: 00 f0 18 e8 blx #48
+// . + 60 + 4 = 0x1260 = PLT func2
+// DSO-NEXT: 1220: 00 f0 1e e8 blx #60
+// . + 72 + 4 = 0x1270 = PLT func3
+// DSO-NEXT: 1224: 00 f0 24 e8 blx #72
// DSO: Disassembly of section .plt:
// DSO-EMPTY:
// DSO-NEXT: $a:
-// DSO-NEXT: 1020: 04 e0 2d e5 str lr, [sp, #-4]!
-// (0x1024 + 8) + (0 RoR 12) + 4096 + (0xfdc) = 0x3008 = .got.plt[3]
-// DSO-NEXT: 1024: 00 e6 8f e2 add lr, pc, #0, #12
-// DSO-NEXT: 1028: 01 ea 8e e2 add lr, lr, #4096
-// DSO-NEXT: 102c: dc ff be e5 ldr pc, [lr, #4060]!
+// DSO-NEXT: 1230: 04 e0 2d e5 str lr, [sp, #-4]!
+// (0x1234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[3]
+// DSO-NEXT: 1234: 00 e6 8f e2 add lr, pc, #0, #12
+// DSO-NEXT: 1238: 02 ea 8e e2 add lr, lr, #8192
+// DSO-NEXT: 123c: a4 f0 be e5 ldr pc, [lr, #164]!
// DSO: $d:
-// DSO-NEXT: 1030: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 1034: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 1038: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 103c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1240: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1244: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1248: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: $a:
-// (0x1040 + 8) + (0 RoR 12) + 4096 + (0xfc4) = 0x300c
-// DSO-NEXT: 1040: 00 c6 8f e2 add r12, pc, #0, #12
-// DSO-NEXT: 1044: 01 ca 8c e2 add r12, r12, #4096
-// DSO-NEXT: 1048: c4 ff bc e5 ldr pc, [r12, #4036]!
+// (0x1250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4
+// DSO-NEXT: 1250: 00 c6 8f e2 add r12, pc, #0, #12
+// DSO-NEXT: 1254: 02 ca 8c e2 add r12, r12, #8192
+// DSO-NEXT: 1258: 8c f0 bc e5 ldr pc, [r12, #140]!
// DSO: $d:
-// DSO-NEXT: 104c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 125c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: $a:
-// (0x1050 + 8) + (0 RoR 12) + 4096 + (0xfb8) = 0x3010
-// DSO-NEXT: 1050: 00 c6 8f e2 add r12, pc, #0, #12
-// DSO-NEXT: 1054: 01 ca 8c e2 add r12, r12, #4096
-// DSO-NEXT: 1058: b8 ff bc e5 ldr pc, [r12, #4024]!
+// (0x1260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8
+// DSO-NEXT: 1260: 00 c6 8f e2 add r12, pc, #0, #12
+// DSO-NEXT: 1264: 02 ca 8c e2 add r12, r12, #8192
+// DSO-NEXT: 1268: 80 f0 bc e5 ldr pc, [r12, #128]!
// DSO: $d:
-// DSO-NEXT: 105c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 126c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: $a:
-// (0x1060 + 8) + (0 RoR 12) + 4096 + (0xfac) = 0x3014
-// DSO-NEXT: 1060: 00 c6 8f e2 add r12, pc, #0, #12
-// DSO-NEXT: 1064: 01 ca 8c e2 add r12, r12, #4096
-// DSO-NEXT: 1068: ac ff bc e5 ldr pc, [r12, #4012]!
+// (0x1270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec
+// DSO-NEXT: 1270: 00 c6 8f e2 add r12, pc, #0, #12
+// DSO-NEXT: 1274: 02 ca 8c e2 add r12, r12, #8192
+// DSO-NEXT: 1278: 74 f0 bc e5 ldr pc, [r12, #116]!
// DSO: $d:
-// DSO-NEXT: 106c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 127c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSOREL: Name: .got.plt
// DSOREL-NEXT: Type: SHT_PROGBITS
@@ -100,7 +100,7 @@ _start:
// DSOREL-NEXT: SHF_ALLOC
// DSOREL-NEXT: SHF_WRITE
// DSOREL-NEXT: ]
-// DSOREL-NEXT: Address: 0x3000
+// DSOREL-NEXT: Address: 0x32D8
// DSOREL-NEXT: Offset:
// DSOREL-NEXT: Size: 24
// DSOREL-NEXT: Link:
@@ -108,7 +108,7 @@ _start:
// DSOREL-NEXT: AddressAlignment: 4
// DSOREL-NEXT: EntrySize:
// DSOREL: Relocations [
-// DSOREL-NEXT: Section (4) .rel.plt {
-// DSOREL-NEXT: 0x300C R_ARM_JUMP_SLOT func1 0x0
-// DSOREL-NEXT: 0x3010 R_ARM_JUMP_SLOT func2 0x0
-// DSOREL-NEXT: 0x3014 R_ARM_JUMP_SLOT func3 0x0
+// DSOREL-NEXT: Section (5) .rel.plt {
+// DSOREL-NEXT: 0x32E4 R_ARM_JUMP_SLOT func1 0x0
+// DSOREL-NEXT: 0x32E8 R_ARM_JUMP_SLOT func2 0x0
+// DSOREL-NEXT: 0x32EC R_ARM_JUMP_SLOT func3 0x0
Modified: lld/trunk/test/ELF/arm-thumb-thunk-empty-pass.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thumb-thunk-empty-pass.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thumb-thunk-empty-pass.s (original)
+++ lld/trunk/test/ELF/arm-thumb-thunk-empty-pass.s Tue Aug 27 04:52:36 2019
@@ -1,7 +1,7 @@
// REQUIRES: arm
-// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
-// RUN: ld.lld %t -o %t2
-// RUN: llvm-objdump -d %t2 -triple=thumbv7a | FileCheck %s
+// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t.o
+// RUN: ld.lld %t.o -o %t
+// RUN: llvm-objdump -d %t -triple=thumbv7a | FileCheck %s
.syntax unified
.global _start, foo
.type _start, %function
@@ -18,13 +18,13 @@ foo:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: _start:
-// CHECK-NEXT: 11000: ff f7 fe ff bl #-4
+// CHECK-NEXT: 110b4: ff f7 fe ff bl #-4
// CHECK: __Thumbv7ABSLongThunk__start:
-// CHECK-NEXT: 11004: ff f7 fc bf b.w #-8 <_start>
+// CHECK-NEXT: 110b8: ff f7 fc bf b.w #-8 <_start>
// CHECK: __Thumbv7ABSLongThunk__start:
-// CHECK: 1011008: 41 f2 01 0c movw r12, #4097
-// CHECK-NEXT: 101100c: c0 f2 01 0c movt r12, #1
-// CHECK-NEXT: 1011010: 60 47 bx r12
+// CHECK: 10110bc: 41 f2 b5 0c movw r12, #4277
+// CHECK-NEXT: 10110c0: c0 f2 01 0c movt r12, #1
+// CHECK-NEXT: 10110c4: 60 47 bx r12
// CHECK: foo:
-// CHECK-NEXT: 1011012: ff f7 f9 ff bl #-14
+// CHECK-NEXT: 10110c6: ff f7 f9 ff bl #-14
Modified: lld/trunk/test/ELF/arm-thumb-thunk-symbols.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thumb-thunk-symbols.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thumb-thunk-symbols.s (original)
+++ lld/trunk/test/ELF/arm-thumb-thunk-symbols.s Tue Aug 27 04:52:36 2019
@@ -25,18 +25,18 @@ arm_fn:
b thumb_fn
// CHECK: Name: __Thumbv7ABSLongThunk_arm_fn
-// CHECK-NEXT: Value: 0x12005
+// CHECK-NEXT: Value: 0x13005
// CHECK-NEXT: Size: 10
// CHECK-NEXT: Binding: Local (0x0)
// CHECK-NEXT: Type: Function (0x2)
// CHECK: Name: __ARMv7ABSLongThunk_thumb_fn
-// CHECK-NEXT: Value: 0x12010
+// CHECK-NEXT: Value: 0x13010
// CHECK-NEXT: Size: 12
// CHECK-NEXT: Binding: Local (0x0)
// CHECK-NEXT: Type: Function (0x2)
// CHECK-PI: Name: __ThumbV7PILongThunk_arm_fn
-// CHECK-PI-NEXT: Value: 0x2005
+// CHECK-PI-NEXT: Value: 0x3005
// CHECK-PI-NEXT: Size: 12
// CHECK-PI-NEXT: Binding: Local (0x0)
// CHECK-PI-NEXT: Type: Function (0x2)
Modified: lld/trunk/test/ELF/arm-thumb-undefined-weak.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thumb-undefined-weak.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thumb-undefined-weak.s (original)
+++ lld/trunk/test/ELF/arm-thumb-undefined-weak.s Tue Aug 27 04:52:36 2019
@@ -29,10 +29,10 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK: 11000: {{.*}} beq.w #0 <_start+0x4>
-// CHECK-NEXT: 11004: {{.*}} b.w #0 <_start+0x8>
-// CHECK-NEXT: 11008: {{.*}} bl #0
+// CHECK: 110b4: {{.*}} beq.w #0 <_start+0x4>
+// CHECK-NEXT: 110b8: {{.*}} b.w #0 <_start+0x8>
+// CHECK-NEXT: 110bc: {{.*}} bl #0
// blx is transformed into bl so we don't change state
-// CHECK-NEXT: 1100c: {{.*}} bl #0
-// CHECK-NEXT: 11010: {{.*}} movt r0, #0
-// CHECK-NEXT: 11014: {{.*}} movw r0, #0
+// CHECK-NEXT: 110c0: {{.*}} bl #0
+// CHECK-NEXT: 110c4: {{.*}} movt r0, #0
+// CHECK-NEXT: 110c8: {{.*}} movw r0, #0
Modified: lld/trunk/test/ELF/arm-thunk-largesection.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thunk-largesection.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thunk-largesection.s (original)
+++ lld/trunk/test/ELF/arm-thunk-largesection.s Tue Aug 27 04:52:36 2019
@@ -1,11 +1,11 @@
// REQUIRES: arm
// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
// RUN: ld.lld %t -o %t2
-// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi -start-address=69632 -stop-address=69636 %t2 | FileCheck -check-prefix=CHECK1 %s
-// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi -start-address=73732 -stop-address=73742 %t2 | FileCheck -check-prefix=CHECK2 %s
-// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi -start-address=16850936 -stop-address=16850940 %t2 | FileCheck -check-prefix=CHECK3 %s
-// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi -start-address=33628152 -stop-address=33628156 %t2 | FileCheck -check-prefix=CHECK4 %s
-// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi -start-address=50405356 -stop-address=50405376 %t2 | FileCheck -check-prefix=CHECK5 %s
+// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi --start-address=0x12000 --stop-address=0x12006 %t2 | FileCheck -check-prefix=CHECK1 %s
+// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi --start-address=0x13004 --stop-address=0x13008 %t2 | FileCheck -check-prefix=CHECK2 %s
+// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi --start-address=0x1012ff8 --stop-address=0x1012ffc %t2 | FileCheck -check-prefix=CHECK3 %s
+// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi --start-address=0x2012ff8 --stop-address=0x2012ffc %t2 | FileCheck -check-prefix=CHECK4 %s
+// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi --start-address=0x3012fec --stop-address=0x3012ff6 %t2 | FileCheck -check-prefix=CHECK5 %s
.syntax unified
.balign 0x1000
.thumb
@@ -18,14 +18,14 @@ _start:
// CHECK1: Disassembly of section .text:
// CHECK1-EMPTY:
// CHECK1-NEXT:_start:
-// CHECK1-NEXT: 11000: 70 47 bx lr
+// CHECK1-NEXT: 12000: 70 47 bx lr
// CHECK1-EMPTY:
-// CHECK-NEXT:$d.1:
-// CHECK-NEXT: 11002: 00 00 .short 0x0000
+// CHECK1-NEXT:$d.1:
+// CHECK1-NEXT: 12002: 00 00 00 00 .word 0x00000000
// CHECK2: __Thumbv7ABSLongThunk__start:
-// CHECK2-NEXT: 12004: fe f7 fc bf b.w #-4104 <_start>
+// CHECK2-NEXT: 13004: fe f7 fc bf b.w #-4104 <_start>
// Gigantic section where we need a ThunkSection either side of it
.section .text.large1, "ax", %progbits
@@ -35,10 +35,10 @@ _start:
.space (16 * 1024 * 1024) - 4
bl _start
.space (16 * 1024 * 1024) - 16
-// CHECK3: 1011ff8: 00 f4 04 d0 bl #-16777208
-// CHECK4: 2011ff8: ff f3 f8 d7 bl #16777200
+// CHECK3: 1012ff8: 00 f4 04 d0 bl #-16777208
+// CHECK4: 2012ff8: ff f3 f8 d7 bl #16777200
// CHECK5: __Thumbv7ABSLongThunk__start:
-// CHECK5-NEXT: 3011fec: 41 f2 01 0c movw r12, #4097
-// CHECK5-NEXT: 3011ff0: c0 f2 01 0c movt r12, #1
-// CHECK5-NEXT: 3011ff4: 60 47 bx r12
+// CHECK5-NEXT: 3012fec: 42 f2 01 0c movw r12, #8193
+// CHECK5-NEXT: 3012ff0: c0 f2 01 0c movt r12, #1
+// CHECK5-NEXT: 3012ff4: 60 47 bx r12
Modified: lld/trunk/test/ELF/arm-thunk-multipass-plt.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thunk-multipass-plt.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thunk-multipass-plt.s (original)
+++ lld/trunk/test/ELF/arm-thunk-multipass-plt.s Tue Aug 27 04:52:36 2019
@@ -74,8 +74,8 @@ preemptible2:
// CHECK-PLT-NEXT: 00d00020 $a:
// CHECK-PLT-NEXT: d00020: 04 e0 2d e5 str lr, [sp, #-4]!
// CHECK-PLT-NEXT: d00024: 00 e6 8f e2 add lr, pc, #0, #12
-// CHECK-PLT-NEXT: d00028: 01 ea 8e e2 add lr, lr, #4096
-// CHECK-PLT-NEXT: d0002c: dc ff be e5 ldr pc, [lr, #4060]!
+// CHECK-PLT-NEXT: d00028: 02 ea 8e e2 add lr, lr, #8192
+// CHECK-PLT-NEXT: d0002c: 94 f0 be e5 ldr pc, [lr, #148]!
// CHECK-PLT: 00d00030 $d:
// CHECK-PLT-NEXT: d00030: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-PLT-NEXT: d00034: d4 d4 d4 d4 .word 0xd4d4d4d4
@@ -83,13 +83,13 @@ preemptible2:
// CHECK-PLT-NEXT: d0003c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-PLT: 00d00040 $a:
// CHECK-PLT-NEXT: d00040: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK-PLT-NEXT: d00044: 01 ca 8c e2 add r12, r12, #4096
-// CHECK-PLT-NEXT: d00048: c4 ff bc e5 ldr pc, [r12, #4036]!
+// CHECK-PLT-NEXT: d00044: 02 ca 8c e2 add r12, r12, #8192
+// CHECK-PLT-NEXT: d00048: 7c f0 bc e5 ldr pc, [r12, #124]!
// CHECK-PLT: 00d0004c $d:
// CHECK-PLT-NEXT: d0004c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-PLT: 00d00050 $a:
// CHECK-PLT-NEXT: d00050: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK-PLT-NEXT: d00054: 01 ca 8c e2 add r12, r12, #4096
-// CHECK-PLT-NEXT: d00058: b8 ff bc e5 ldr pc, [r12, #4024]!
+// CHECK-PLT-NEXT: d00054: 02 ca 8c e2 add r12, r12, #8192
+// CHECK-PLT-NEXT: d00058: 70 f0 bc e5 ldr pc, [r12, #112]!
// CHECK-PLT: 00d0005c $d:
// CHECK-PLT-NEXT: d0005c: d4 d4 d4 d4 .word 0xd4d4d4d4
Modified: lld/trunk/test/ELF/arm-thunk-nosuitable.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thunk-nosuitable.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thunk-nosuitable.s (original)
+++ lld/trunk/test/ELF/arm-thunk-nosuitable.s Tue Aug 27 04:52:36 2019
@@ -1,7 +1,7 @@
// REQUIRES: arm
// RUN: llvm-mc %s --arm-add-build-attributes --triple=armv7a-linux-gnueabihf --filetype=obj -o %t.o
// RUN: ld.lld %t.o -o %t
-// RUN: llvm-objdump -triple=thumbv7a-linux-gnueabihf -d -start-address=2166784 -stop-address=2166794 %t | FileCheck %s
+// RUN: llvm-objdump -triple=thumbv7a -d --start-address=0x2110b4 --stop-address=0x2110be %t | FileCheck %s
// Create a conditional branch too far away from a precreated thunk
// section. This will need a thunk section created within range.
@@ -20,10 +20,10 @@ _start:
bx lr
// CHECK: _start:
-// CHECK-NEXT: 211000: 00 f0 00 80 beq.w #0
+// CHECK-NEXT: 2110b4: 00 f0 00 80 beq.w #0
// CHECK: __Thumbv7ABSLongThunk_target:
-// CHECK-NEXT: 211004: 00 f0 01 90 b.w #12582914
-// CHECK: 211008: 70 47 bx lr
+// CHECK-NEXT: 2110b8: 00 f0 01 90 b.w #12582914
+// CHECK: 2110bc: 70 47 bx lr
.section .text.2, "ax", %progbits
.space 12 * 1024 * 1024
Modified: lld/trunk/test/ELF/arm-thunk-re-add.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thunk-re-add.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thunk-re-add.s (original)
+++ lld/trunk/test/ELF/arm-thunk-re-add.s Tue Aug 27 04:52:36 2019
@@ -103,8 +103,8 @@ callers:
// CHECK3-NEXT: $a:
// CHECK3-NEXT: 1100020: 04 e0 2d e5 str lr, [sp, #-4]!
// CHECK3-NEXT: 1100024: 00 e6 8f e2 add lr, pc, #0, #12
-// CHECK3-NEXT: 1100028: 01 ea 8e e2 add lr, lr, #4096
-// CHECK3-NEXT: 110002c: dc ff be e5 ldr pc, [lr, #4060]!
+// CHECK3-NEXT: 1100028: 02 ea 8e e2 add lr, lr, #8192
+// CHECK3-NEXT: 110002c: 94 f0 be e5 ldr pc, [lr, #148]!
// CHECK3: $d:
// CHECK3-NEXT: 1100030: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK3-NEXT: 1100034: d4 d4 d4 d4 .word 0xd4d4d4d4
@@ -112,13 +112,13 @@ callers:
// CHECK3-NEXT: 110003c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK3: $a:
// CHECK3-NEXT: 1100040: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK3-NEXT: 1100044: 01 ca 8c e2 add r12, r12, #4096
-// CHECK3-NEXT: 1100048: c4 ff bc e5 ldr pc, [r12, #4036]!
+// CHECK3-NEXT: 1100044: 02 ca 8c e2 add r12, r12, #8192
+// CHECK3-NEXT: 1100048: 7c f0 bc e5 ldr pc, [r12, #124]!
// CHECK3: $d:
// CHECK3-NEXT: 110004c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK3: $a:
// CHECK3-NEXT: 1100050: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK3-NEXT: 1100054: 01 ca 8c e2 add r12, r12, #4096
-// CHECK3-NEXT: 1100058: b8 ff bc e5 ldr pc, [r12, #4024]!
+// CHECK3-NEXT: 1100054: 02 ca 8c e2 add r12, r12, #8192
+// CHECK3-NEXT: 1100058: 70 f0 bc e5 ldr pc, [r12, #112]!
// CHECK3: $d:
// CHECK3-NEXT: 110005c: d4 d4 d4 d4 .word 0xd4d4d4d4
Modified: lld/trunk/test/ELF/arm-tls-gd-nonpreemptible.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-tls-gd-nonpreemptible.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-tls-gd-nonpreemptible.s (original)
+++ lld/trunk/test/ELF/arm-tls-gd-nonpreemptible.s Tue Aug 27 04:52:36 2019
@@ -64,9 +64,9 @@ x4:
.space 4
// CHECK: Contents of section .got:
-// CHECK-NEXT: 12008 01000000 00000000 01000000 04000000
-// CHECK-NEXT: 12018 01000000 08000000 01000000 0c000000
+// CHECK-NEXT: 12140 01000000 00000000 01000000 04000000
+// CHECK-NEXT: 12150 01000000 08000000 01000000 0c000000
// CHECK-SHARED: Contents of section .got:
-// CHECK-SHARED-NEXT: 2058 00000000 00000000 00000000 04000000
-// CHECK-SHARED-NEXT: 2068 00000000 00000000 00000000 00000000
+// CHECK-SHARED-NEXT: 22a8 00000000 00000000 00000000 04000000
+// CHECK-SHARED-NEXT: 22b8 00000000 00000000 00000000 00000000
Modified: lld/trunk/test/ELF/arm-tls-gd32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-tls-gd32.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-tls-gd32.s (original)
+++ lld/trunk/test/ELF/arm-tls-gd32.s Tue Aug 27 04:52:36 2019
@@ -1,6 +1,6 @@
// REQUIRES: arm
// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
-// RUN: ld.lld --hash-style=sysv %t.o -o %t.so -shared
+// RUN: ld.lld %t.o -o %t.so -shared
// RUN: llvm-readobj -S --dyn-relocations %t.so | FileCheck --check-prefix=SEC %s
// RUN: llvm-objdump -d -triple=armv7a-linux-gnueabi %t.so | FileCheck %s
@@ -62,7 +62,7 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x2000
+// SEC-NEXT: Address: 0x2210
// SEC: Size: 4
// SEC: Name: .tbss
// SEC-NEXT: Type: SHT_NOBITS
@@ -71,7 +71,7 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x2004
+// SEC-NEXT: Address: 0x2214
// SEC: Size: 8
// SEC: Name: .got
@@ -80,26 +80,26 @@ x:
// SEC-NEXT: SHF_ALLOC
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x204C
+// SEC-NEXT: Address: 0x2264
// SEC: Size: 24
// SEC: Dynamic Relocations {
-// SEC-NEXT: 0x205C R_ARM_TLS_DTPMOD32 -
-// SEC-NEXT: 0x204C R_ARM_TLS_DTPMOD32 x
-// SEC-NEXT: 0x2050 R_ARM_TLS_DTPOFF32 x
-// SEC-NEXT: 0x2054 R_ARM_TLS_DTPMOD32 y
-// SEC-NEXT: 0x2058 R_ARM_TLS_DTPOFF32 y
-
-
-// CHECK-LABEL: 00001000 func:
-// CHECK-NEXT: 1000: 00 f0 20 e3 nop
-// CHECK-NEXT: 1004: 00 f0 20 e3 nop
-// CHECK-NEXT: 1008: 00 f0 20 e3 nop
-
-// (0x204c - 0x100c) + (0x100c - 0x1000 - 8) = 0x1044
-// CHECK: 100c: 44 10 00 00
-// (0x2054 - 0x1010) + (0x1010 - 0x1004 - 8) = 0x1048
-// CHECK-NEXT: 1010: 48 10 00 00
-// (0x205c - 0x1014) + (0x1014 - 0x1008 - 8) = 0x104c
-// CHECK-NEXT: 1014: 4c 10 00 00
+// SEC-NEXT: 0x2274 R_ARM_TLS_DTPMOD32 -
+// SEC-NEXT: 0x2264 R_ARM_TLS_DTPMOD32 x
+// SEC-NEXT: 0x2268 R_ARM_TLS_DTPOFF32 x
+// SEC-NEXT: 0x226C R_ARM_TLS_DTPMOD32 y
+// SEC-NEXT: 0x2270 R_ARM_TLS_DTPOFF32 y
+
+
+// CHECK-LABEL: 000011f8 func:
+// CHECK-NEXT: 11f8: 00 f0 20 e3 nop
+// CHECK-NEXT: 11fc: 00 f0 20 e3 nop
+// CHECK-NEXT: 1200: 00 f0 20 e3 nop
+
+// (0x2264 - 0x1204) + (0x1204 - 0x11f8 - 8) = 0x1064
+// CHECK: 1204: 64 10 00 00
+// (0x226c - 0x1204) + (0x1204 - 0x11fc - 8) = 0x1068
+// CHECK-NEXT: 1208: 68 10 00 00
+// (0x2274 - 0x1204) + (0x1204 - 0x1200 - 8) = 0x106c
+// CHECK-NEXT: 120c: 6c 10 00 00
Modified: lld/trunk/test/ELF/arm-tls-ie32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-tls-ie32.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-tls-ie32.s (original)
+++ lld/trunk/test/ELF/arm-tls-ie32.s Tue Aug 27 04:52:36 2019
@@ -1,6 +1,6 @@
// REQUIRES: arm
// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
-// RUN: ld.lld --hash-style=sysv %t.o -o %t.so -shared
+// RUN: ld.lld %t.o -o %t.so -shared
// RUN: llvm-readobj -S --dyn-relocations %t.so | FileCheck --check-prefix=SEC %s
// RUN: llvm-objdump -d -triple=armv7a-linux-gnueabi %t.so | FileCheck %s
@@ -73,25 +73,25 @@ x:
// SEC-NEXT: SHF_ALLOC
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x204C
+// SEC-NEXT: Address: 0x2254
// SEC: Size: 12
// SEC: Dynamic Relocations {
-// SEC: 0x2054 R_ARM_TLS_TPOFF32
-// SEC: 0x204C R_ARM_TLS_TPOFF32 x
-// SEC: 0x2050 R_ARM_TLS_TPOFF32 y
+// SEC: 0x225C R_ARM_TLS_TPOFF32
+// SEC: 0x2254 R_ARM_TLS_TPOFF32 x
+// SEC: 0x2258 R_ARM_TLS_TPOFF32 y
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: func:
-// CHECK-NEXT: 1000: 00 f0 20 e3 nop
-// CHECK-NEXT: 1004: 00 f0 20 e3 nop
-// CHECK-NEXT: 1008: 00 f0 20 e3 nop
-
-// (0x204c - 0x100c) + (0x100c - 0x1000 - 8) = 0x1044
-// CHECK: 100c: 44 10 00 00
-// (0x2050 - 0x1010) + (0x1010 - 0x1004 - 8) = 0x1044
-// CHECK-NEXT: 1010: 44 10 00 00
-// (0x2054 - 0x1014) + (0x1014 - 0x1008 - 8) = 0x1044
-// CHECK-NEXT: 1014: 44 10 00 00
+// CHECK-NEXT: 11e8: 00 f0 20 e3 nop
+// CHECK-NEXT: 11ec: 00 f0 20 e3 nop
+// CHECK-NEXT: 11f0: 00 f0 20 e3 nop
+
+// (0x2254 - 0x11f4) + (0x11f4 - 0x11e8 - 8) = 0x1064
+// CHECK: 11f4: 64 10 00 00
+// (0x2258 - 0x11f8) + (0x11f8 - 0x11ec - 8) = 0x1064
+// CHECK-NEXT: 11f8: 64 10 00 00
+// (0x225c - 0x11f8) + (0x11f8 - 0x11f0 - 8) = 0x1064
+// CHECK-NEXT: 11fc: 64 10 00 00
Modified: lld/trunk/test/ELF/arm-tls-ldm32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-tls-ldm32.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-tls-ldm32.s (original)
+++ lld/trunk/test/ELF/arm-tls-ldm32.s Tue Aug 27 04:52:36 2019
@@ -1,6 +1,6 @@
// REQUIRES: arm
// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
-// RUN: ld.lld --hash-style=sysv %t.o -o %t.so -shared
+// RUN: ld.lld %t.o -o %t.so -shared
// RUN: llvm-readobj -S --dyn-relocations %t.so | FileCheck --check-prefix=SEC %s
// RUN: llvm-objdump -d -triple=armv7a-linux-gnueabi %t.so | FileCheck %s
// RUN: ld.lld %t.o -o %t
@@ -42,7 +42,7 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x2000
+// SEC-NEXT: Address: 0x21D0
// SEC: Size: 4
// SEC: Name: .tbss
// SEC-NEXT: Type: SHT_NOBITS (0x8)
@@ -51,24 +51,24 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x2004
+// SEC-NEXT: Address: 0x21D4
// SEC: Size: 4
// SEC: Dynamic Relocations {
-// SEC-NEXT: 0x204C R_ARM_TLS_DTPMOD32 - 0x0
+// SEC-NEXT: 0x2224 R_ARM_TLS_DTPMOD32 - 0x0
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: _start:
-// CHECK-NEXT: 1000: 00 f0 20 e3 nop
+// CHECK-NEXT: 11c0: 00 f0 20 e3 nop
-// (0x204c - 0x1004) + (0x1004 - 0x1000 - 8) = 0x1044
-// CHECK: 1004: 44 10 00 00
-// CHECK-NEXT: 1008: 00 00 00 00
-// CHECK-NEXT: 100c: 04 00 00 00
+// (0x2224 - 0x11c4) + (0x11c4 - 0x11c0 - 8) = 0x105c
+// CHECK: 11c4: 5c 10 00 00
+// CHECK-NEXT: 11c8: 00 00 00 00
+// CHECK-NEXT: 11cc: 04 00 00 00
// CHECK-EXE: _start:
-// CHECK-EXE-NEXT: 11000: 00 f0 20 e3 nop
-// CHECK-EXE: 11004: fc 0f 00 00
-// CHECK-EXE-NEXT: 11008: 00 00 00 00
-// CHECK-EXE-NEXT: 1100c: 04 00 00 00
+// CHECK-EXE-NEXT: 11114: 00 f0 20 e3 nop
+// CHECK-EXE: 11118: 0c 10 00 00
+// CHECK-EXE-NEXT: 1111c: 00 00 00 00
+// CHECK-EXE-NEXT: 11120: 04 00 00 00
Modified: lld/trunk/test/ELF/arm-tls-le32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-tls-le32.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-tls-le32.s (original)
+++ lld/trunk/test/ELF/arm-tls-le32.s Tue Aug 27 04:52:36 2019
@@ -52,7 +52,7 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x12000
+// SEC-NEXT: Address: 0x12120
// SEC: Size: 4
// SEC: Name: .tbss
// SEC-NEXT: Type: SHT_NOBITS
@@ -61,7 +61,7 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x12004
+// SEC-NEXT: Address: 0x12124
// SEC: Size: 8
// SEC: Dynamic Relocations {
@@ -71,8 +71,8 @@ x:
// CHECK-EMPTY:
// CHECK-NEXT: _start:
// offset of x from Thread pointer = (TcbSize + 0x0 = 0x8)
-// CHECK-NEXT: 11000: 08 00 00 00
+// CHECK-NEXT: 11114: 08 00 00 00
// offset of z from Thread pointer = (TcbSize + 0x8 = 0x10)
-// CHECK-NEXT: 11004: 10 00 00 00
+// CHECK-NEXT: 11118: 10 00 00 00
// offset of y from Thread pointer = (TcbSize + 0x4 = 0xc)
-// CHECK-NEXT: 11008: 0c 00 00 00
+// CHECK-NEXT: 1111c: 0c 00 00 00
Modified: lld/trunk/test/ELF/arm-tls-norelax-gd-ie.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-tls-norelax-gd-ie.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-tls-norelax-gd-ie.s (original)
+++ lld/trunk/test/ELF/arm-tls-norelax-gd-ie.s Tue Aug 27 04:52:36 2019
@@ -2,7 +2,7 @@
// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %p/Inputs/arm-tls-get-addr.s -o %t1.o
// RUN: ld.lld %t1.o --shared -soname=t1.so -o %t1.so
// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
-// RUN: ld.lld --hash-style=sysv %t1.so %t.o -o %t
+// RUN: ld.lld %t1.so %t.o -o %t
// RUN: llvm-readobj -S --dyn-relocations %t | FileCheck %s
// This tls global-dynamic sequence is with respect to a preemptible symbol but
@@ -25,6 +25,6 @@ func:
.Lt0: .word y(TLSGD) + (. - .L0 - 8)
// CHECK: Dynamic Relocations {
-// CHECK-NEXT: 0x12078 R_ARM_TLS_DTPMOD32 y
-// CHECK-NEXT: 0x1207C R_ARM_TLS_DTPOFF32 y
-// CHECK-NEXT: 0x1300C R_ARM_JUMP_SLOT __tls_get_addr
+// CHECK-NEXT: 0x12290 R_ARM_TLS_DTPMOD32 y
+// CHECK-NEXT: 0x12294 R_ARM_TLS_DTPOFF32 y
+// CHECK-NEXT: 0x132A4 R_ARM_JUMP_SLOT __tls_get_addr
Modified: lld/trunk/test/ELF/arm-tls-norelax-gd-le.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-tls-norelax-gd-le.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-tls-norelax-gd-le.s (original)
+++ lld/trunk/test/ELF/arm-tls-norelax-gd-le.s Tue Aug 27 04:52:36 2019
@@ -2,7 +2,7 @@
// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %p/Inputs/arm-tls-get-addr.s -o %t1.o
// RUN: ld.lld %t1.o --shared -soname=t1.so -o %t1.so
// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
-// RUN: ld.lld --hash-style=sysv %t1.so %t.o -o %t
+// RUN: ld.lld %t1.so %t.o -o %t
// RUN: llvm-objdump -s %t | FileCheck %s
// This tls global-dynamic sequence is with respect to a non-preemptible
@@ -33,7 +33,7 @@ x:
// CHECK: Contents of section .got:
// Module index is always 1 for executable
-// CHECK-NEXT: 12060 01000000 00000000
+// CHECK-NEXT: 12268 01000000 00000000
// Without any definition of __tls_get_addr we get an error
Modified: lld/trunk/test/ELF/arm-tls-norelax-ie-le.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-tls-norelax-ie-le.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-tls-norelax-ie-le.s (original)
+++ lld/trunk/test/ELF/arm-tls-norelax-ie-le.s Tue Aug 27 04:52:36 2019
@@ -2,7 +2,7 @@
// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %p/Inputs/arm-tls-get-addr.s -o %t1.o
// RUN: ld.lld %t1.o --shared -soname=t1.so -o %t1.so
// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
-// RUN: ld.lld --hash-style=sysv %t1.so %t.o -o %t
+// RUN: ld.lld %t1.so %t.o -o %t
// RUN: llvm-objdump -s -triple=armv7a-linux-gnueabi %t | FileCheck %s
// This tls Initial Exec sequence is with respect to a non-preemptible symbol
@@ -38,4 +38,4 @@ x2:
// CHECK: Contents of section .got:
// x1 at offset 8 from TP, x2 at offset 0xc from TP. Offsets include TCB size of 8
-// CHECK-NEXT: 12064 08000000 0c000000
+// CHECK-NEXT: 1227c 08000000 0c000000
Modified: lld/trunk/test/ELF/arm-tls-norelax-ld-le.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-tls-norelax-ld-le.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-tls-norelax-ld-le.s (original)
+++ lld/trunk/test/ELF/arm-tls-norelax-ld-le.s Tue Aug 27 04:52:36 2019
@@ -2,7 +2,7 @@
// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %p/Inputs/arm-tls-get-addr.s -o %t1.o
// RUN: ld.lld %t1.o --shared -soname=t1.so -o %t1.so
// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
-// RUN: ld.lld --hash-style=sysv %t1.so %t.o -o %t
+// RUN: ld.lld %t1.so %t.o -o %t
// RUN: llvm-objdump -s %t | FileCheck %s
.global __tls_get_addr
@@ -32,4 +32,4 @@ x:
.word 10
// CHECK: Contents of section .got:
-// CHECK-NEXT: 12064 01000000 00000000
+// CHECK-NEXT: 1227c 01000000 00000000
Modified: lld/trunk/test/ELF/arm-undefined-weak.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-undefined-weak.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-undefined-weak.s (original)
+++ lld/trunk/test/ELF/arm-undefined-weak.s Tue Aug 27 04:52:36 2019
@@ -29,10 +29,11 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK: 11000: {{.*}} b #-4 <_start+0x4>
-// CHECK-NEXT: 11004: {{.*}} bl #-4 <_start+0x8>
+// CHECK: 110b4: {{.*}} b #-4 <_start+0x4>
+// CHECK-NEXT: 110b8: {{.*}} bl #-4 <_start+0x8>
// blx is transformed into bl so we don't change state
-// CHECK-NEXT: 11008: {{.*}} bl #-4 <_start+0xc>
-// CHECK-NEXT: 1100c: {{.*}} movt r0, #0
-// CHECK-NEXT: 11010: {{.*}} movw r0, #0
-// CHECK: 11014: {{.*}} .word 0x00000000
+// CHECK-NEXT: 110bc: {{.*}} bl #-4 <_start+0xc>
+// CHECK-NEXT: 110c0: {{.*}} movt r0, #0
+// CHECK-NEXT: 110c4: {{.*}} movw r0, #0
+// CHECK: 110c8: {{.*}} .word 0x00000000
+
Modified: lld/trunk/test/ELF/global-offset-table-position-arm.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/global-offset-table-position-arm.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/global-offset-table-position-arm.s (original)
+++ lld/trunk/test/ELF/global-offset-table-position-arm.s Tue Aug 27 04:52:36 2019
@@ -25,7 +25,7 @@ _start:
.data
// CHECK: Name: _GLOBAL_OFFSET_TABLE_
-// CHECK-NEXT: Value: 0x2068
+// CHECK-NEXT: Value: 0x2268
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Local
// CHECK-NEXT: Type: None
Modified: lld/trunk/test/ELF/pack-dyn-relocs-arm2.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/pack-dyn-relocs-arm2.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/pack-dyn-relocs-arm2.s (original)
+++ lld/trunk/test/ELF/pack-dyn-relocs-arm2.s Tue Aug 27 04:52:36 2019
@@ -8,40 +8,40 @@
// RUN: llvm-readobj -r %t.exe | FileCheck %s
// CHECK: Section (5) .relr.dyn {
-// CHECK-NEXT: 0x2000 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2004 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2008 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x200C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2010 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2014 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2018 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x201C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2020 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2024 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2028 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x202C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2030 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2034 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2038 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x203C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2040 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2044 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2048 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x204C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2050 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2054 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2058 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x205C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2060 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2064 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2068 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x206C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2070 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2074 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2078 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x207C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2080 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x2084 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x31E0 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x31E4 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x31E8 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x31EC R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x31F0 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x31F4 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x31F8 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x31FC R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3200 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3204 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3208 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x320C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3210 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3214 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3218 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x321C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3220 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3224 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3228 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x322C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3230 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3234 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3238 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x323C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3240 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3244 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3248 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x324C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3250 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3254 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3258 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x325C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3260 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3264 R_ARM_RELATIVE - 0x0
// CHECK-NEXT: }
// RUN: llvm-readobj -S --dynamic-table %t.exe | FileCheck --check-prefix=HEADER %s
Modified: lld/trunk/test/ELF/pack-dyn-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/pack-dyn-relocs.s?rev=370049&r1=370048&r2=370049&view=diff
==============================================================================
--- lld/trunk/test/ELF/pack-dyn-relocs.s (original)
+++ lld/trunk/test/ELF/pack-dyn-relocs.s Tue Aug 27 04:52:36 2019
@@ -8,42 +8,42 @@
// Unpacked should have the relative relocations in their natural order.
// UNPACKED32: Section ({{.+}}) .rel.dyn {
-// UNPACKED32-NEXT: 0x2000 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2004 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2008 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x200C R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2010 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2014 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2018 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x201C R_ARM_RELATIVE - 0x0
-
-// UNPACKED32-NEXT: 0x2024 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2028 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x202C R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2030 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2034 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2038 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x203C R_ARM_RELATIVE - 0x0
-
-// UNPACKED32-NEXT: 0x2048 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x204C R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2050 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2054 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2058 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x205C R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2060 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2064 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2068 R_ARM_RELATIVE - 0x0
-
-// UNPACKED32-NEXT: 0x206D R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x2020 R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x2044 R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x2071 R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x2075 R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x2079 R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x207D R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x2081 R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x2040 R_ARM_ABS32 zed2 0x0
+// UNPACKED32-NEXT: 0x331C R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3320 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3324 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3328 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x332C R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3330 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3334 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3338 R_ARM_RELATIVE - 0x0
+
+// UNPACKED32-NEXT: 0x3340 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3344 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3348 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x334C R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3350 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3354 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3358 R_ARM_RELATIVE - 0x0
+
+// UNPACKED32-NEXT: 0x3364 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3368 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x336C R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3370 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3374 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3378 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x337C R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3380 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3384 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3389 R_ARM_RELATIVE - 0x0
+
+// UNPACKED32-NEXT: 0x333C R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x3360 R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x338D R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x3391 R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x3395 R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x3399 R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x339D R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x335C R_ARM_ABS32 zed2 0x0
// UNPACKED32-NEXT: }
// RUN: ld.lld -pie --pack-dyn-relocs=android %t.a32.o %t.a32.so -o %t3.a32
@@ -73,44 +73,42 @@
// by the larger groups of relative relocations (i.e. the 8 and 9 followed
// by the 7.)
// ANDROID32: Section ({{.+}}) .rel.dyn {
-// ANDROID32-NEXT: 0x2000 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2004 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2008 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x200C R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2010 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2014 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2018 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x201C R_ARM_RELATIVE - 0x0
-
-// ANDROID32-NEXT: 0x2048 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x204C R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2050 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2054 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2058 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x205C R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2060 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2064 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2068 R_ARM_RELATIVE - 0x0
-
-// ANDROID32-NEXT: 0x2024 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2028 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x202C R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2030 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2034 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x2038 R_ARM_RELATIVE - 0x0
-// ANDROID32-NEXT: 0x203C R_ARM_RELATIVE - 0x0
-
-// ANDROID32-NEXT: 0x206D R_ARM_RELATIVE - 0x0
-
-// ANDROID32-NEXT: 0x2020 R_ARM_ABS32 bar2 0x0
-// ANDROID32-NEXT: 0x2044 R_ARM_ABS32 bar2 0x0
-// ANDROID32-NEXT: 0x2071 R_ARM_ABS32 bar2 0x0
-// ANDROID32-NEXT: 0x2075 R_ARM_ABS32 bar2 0x0
-// ANDROID32-NEXT: 0x2079 R_ARM_ABS32 bar2 0x0
-// ANDROID32-NEXT: 0x207D R_ARM_ABS32 bar2 0x0
-// ANDROID32-NEXT: 0x2081 R_ARM_ABS32 bar2 0x0
+// ANDROID32-NEXT: 0x324C R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3250 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3254 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3258 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x325C R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3260 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3264 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3268 R_ARM_RELATIVE - 0
+
+// ANDROID32-NEXT: 0x3294 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3298 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x329C R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x32A0 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x32A4 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x32A8 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x32AC R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x32B0 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x32B4 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3270 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3274 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3278 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x327C R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3280 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3284 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3288 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x32B9 R_ARM_RELATIVE - 0
+
+// ANDROID32-NEXT: 0x326C R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x3290 R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x32BD R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x32C1 R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x32C5 R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x32C9 R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x32CD R_ARM_ABS32 bar2 0
-// ANDROID32-NEXT: 0x2040 R_ARM_ABS32 zed2 0x0
+// ANDROID32-NEXT: 0x328C R_ARM_ABS32 zed2 0
// ANDROID32-NEXT: }
// RUN: ld.lld -pie --pack-dyn-relocs=relr %t.a32.o %t.a32.so -o %t4.a32
@@ -141,7 +139,7 @@
// SHT_RELR section contains address/bitmap entries
// encoding the offsets for relative relocation.
// RAW-RELR32: Section ({{.+}}) .relr.dyn {
-// RAW-RELR32-NEXT: 0x2000
+// RAW-RELR32-NEXT: 0x327C
// RAW-RELR32-NEXT: 0x7FCFEFF
// RAW-RELR32-NEXT: }
@@ -149,43 +147,43 @@
// but contains only the relative relocations.
// Any relative relocations with odd offset stay in SHT_REL.
// RELR32: Section ({{.+}}) .rel.dyn {
-// RELR32-NEXT: 0x206D R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2020 R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x2044 R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x2071 R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x2075 R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x2079 R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x207D R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x2081 R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x2040 R_ARM_ABS32 zed2 0x0
+// RELR32-NEXT: 0x32E9 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x329C R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x32C0 R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x32ED R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x32F1 R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x32F5 R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x32F9 R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x32FD R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x32BC R_ARM_ABS32 zed2 0x0
// RELR32-NEXT: }
// RELR32-NEXT: Section ({{.+}}) .relr.dyn {
-// RELR32-NEXT: 0x2000 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2004 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2008 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x200C R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2010 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2014 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2018 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x201C R_ARM_RELATIVE - 0x0
-
-// RELR32-NEXT: 0x2024 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2028 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x202C R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2030 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2034 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2038 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x203C R_ARM_RELATIVE - 0x0
-
-// RELR32-NEXT: 0x2048 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x204C R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2050 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2054 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2058 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x205C R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2060 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2064 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x2068 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x327C R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x3280 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x3284 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x3288 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x328C R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x3290 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x3294 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x3298 R_ARM_RELATIVE - 0x0
+
+// RELR32-NEXT: 0x32A0 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32A4 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32A8 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32AC R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32B0 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32B4 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32B8 R_ARM_RELATIVE - 0x0
+
+// RELR32-NEXT: 0x32C4 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32C8 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32CC R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32D0 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32D4 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32D8 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32DC R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32E0 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x32E4 R_ARM_RELATIVE - 0x0
// RELR32-NEXT: }
// RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-linux %p/Inputs/shared2.s -o %t.a64.so.o
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