[PATCH] D66687: [x86] try to form more bt/test + set out of shift+mask patterns
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 25 11:45:21 PDT 2019
spatel updated this revision to Diff 217058.
spatel added a comment.
Patch updated:
1. Move the code to DAGCombiner using the hasBitTest() TLI hook.
2. Add a bailout if the shift amount exceeds a potentially narrower bitwidth.
3. Copy tests to Hexagon target and update for diffs.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D66687/new/
https://reviews.llvm.org/D66687
Files:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/Hexagon/tstbit.ll
llvm/test/CodeGen/X86/test-vs-bittest.ll
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