[PATCH] D63973: [MachineVerifier] Improve checks of target instructions operands.
Bjorn Pettersson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 25 03:58:03 PDT 2019
bjope added a comment.
In D63973#1644279 <https://reviews.llvm.org/D63973#1644279>, @bjope wrote:
> In D63973#1644277 <https://reviews.llvm.org/D63973#1644277>, @lebedev.ri wrote:
>
> > @bjope might know about `DebugInfo/X86/live-debug-vars-discard-invalid.mir` failure
>
>
> Thanks! (I had not noticed this patch)
> I think the problem with `DebugInfo/X86/live-debug-vars-discard-invalid.mir` is that the test case uses the BTS64rr instruction, but it should probably have used BTS64ri8 instead (considering that the second operand is a constant).
> I'll have another look at it and then I'll push a fixup.
Fix pushed in https://reviews.llvm.org/rL369866
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https://reviews.llvm.org/D63973/new/
https://reviews.llvm.org/D63973
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