[PATCH] D63973: [MachineVerifier] Improve checks of target instructions operands.

Jonas Paulsson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 25 01:48:50 PDT 2019


jonpa added a reviewer: craig.topper.
jonpa added a comment.

ping!

It would be very nice if people with knowledge of the Hexagon and X86 backends could help out on fixing the failing tests. Note that these tests have been discovered to have a broken MIR (!), so please help...

Here is a condensed output of 'ninja check' with this patch applied:

  Failing Tests (5):
  LLVM :: CodeGen/Hexagon/expand-condsets-phys-reg.mir
  LLVM :: CodeGen/Hexagon/sdr-global.mir
  LLVM :: CodeGen/X86/xray-custom-log.ll
  LLVM :: CodeGen/X86/xray-typed-event-log.ll
  LLVM :: DebugInfo/X86/live-debug-vars-discard-invalid.mir
  
  ******************** TEST 'LLVM :: CodeGen/Hexagon/expand-condsets-phys-reg.mir' FAILED ********************
  *** Bad machine code: Expected a register operand. ***
  - function:    fred
  - basic block: %bb.0  (0x6071598)
  - instruction: %1:predregs = C2_cmplt %0:intregs, 10
  - operand 2:   10
  LLVM ERROR: Found 1 machine code errors.
  
  ******************** TEST 'LLVM :: CodeGen/Hexagon/sdr-global.mir' FAILED ********************
  *** Bad machine code: Expected a register operand. ***
  - function:    fred
  - basic block: %bb.0  (0x6071938)
  - instruction: %0:doubleregs = A4_combineir 0, @g0
  - operand 2:   @g0
  LLVM ERROR: Found 1 machine code errors.
  FileCheck error: '-' is empty.
  FileCheck command line:  /home/ijonpan/llvm/build/llvm-dev/bin/FileCheck /home/ijonpan/llvm/llvm-dev/test/CodeGen/Hexagon/sdr-global.mir
  
  ******************** TEST 'LLVM :: CodeGen/X86/xray-custom-log.ll' FAILED ********************
  *** Bad machine code: Expected a non-register operand. ***
  - function:    fn
  - basic block: %bb.0  (0x60d88b8)
  - instruction: PATCHABLE_EVENT_CALL killed %1:gr64, killed %0:gr32
  - operand 1:   killed %0:gr32
  LLVM ERROR: Found 1 machine code errors.
  FileCheck error: '-' is empty.
  FileCheck command line:  /home/ijonpan/llvm/build/llvm-dev/bin/FileCheck /home/ijonpan/llvm/llvm-dev/test/CodeGen/X86/xray-custom-log.ll
  
  ******************** TEST 'LLVM :: CodeGen/X86/xray-typed-event-log.ll' FAILED ********************
  *** Bad machine code: Expected a non-register operand. ***
  - function:    fn
  - basic block: %bb.0  (0x60d8ad8)
  - instruction: PATCHABLE_TYPED_EVENT_CALL killed %2:gr16, killed %1:gr64, killed %0:gr32
  - operand 0:   killed %2:gr16
  
  *** Bad machine code: Expected a non-register operand. ***
  - function:    fn
  - basic block: %bb.0  (0x60d8ad8)
  - instruction: PATCHABLE_TYPED_EVENT_CALL killed %2:gr16, killed %1:gr64, killed %0:gr32
  - operand 2:   killed %0:gr32
  LLVM ERROR: Found 2 machine code errors.
  
  ******************** TEST 'LLVM :: DebugInfo/X86/live-debug-vars-discard-invalid.mir' FAILED ********************
  *** Bad machine code: Expected a register operand. ***
  - function:    foobar
  - basic block: %bb.4  (0x60a8128)
  - instruction: %1:gr64 = BTS64rr %1:gr64(tied-def 0), 0, implicit-def $eflags
  - operand 2:   0
  
  *** Bad machine code: Expected a register operand. ***
  - function:    foobar
  - basic block: %bb.4  (0x60a8128)
  - instruction: %1:gr64 = BTS64rr %1:gr64(tied-def 0), 0, implicit-def $eflags
  - operand 2:   0
  
  *** Bad machine code: Expected a register operand. ***
  - function:    foobar
  - basic block: %bb.4  (0x60a8128)
  - instruction: %1:gr64 = BTS64rr %1:gr64(tied-def 0), 0, implicit-def $eflags
  - operand 2:   0
  LLVM ERROR: Found 3 machine code errors.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63973/new/

https://reviews.llvm.org/D63973





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