[PATCH] D66687: [x86] try to form more bt/test + set out of shift+mask patterns
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 24 08:58:18 PDT 2019
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:38981
+ // Look through an optional extension and find a 'not'.
+ // TODO: Should we favor test+set even without the 'not' op?
+ SDValue Not = And->getOperand(0), And1 = And->getOperand(1);
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lebedev.ri wrote:
> I'd think we should, it should just change the predicate i think?
>
Without the not we don’t save any instructions do we? Setcc also has lower throughput on recent Intel CPUs and has a partial register update..
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https://reviews.llvm.org/D66687/new/
https://reviews.llvm.org/D66687
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