[PATCH] D66619: AArch64: Consistent Use of hasZeroCycleZeroingFPWorkaround

[Kyungwoo Lee via Phabricator via llvm-commits]

kyulee created this revision.
kyulee added a reviewer: t.p.northover.
Herald added subscribers: llvm-commits, hiraditya, kristof.beyls, javed.absar.
Herald added a project: LLVM.

This uses hasZeroCycleZeroingFPWorkaround in place of checking FeatureZCZeroingFPWorkaround in AsmParser as with AsmPrinter for its consistent use. No functional change is made.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D66619

Files:
  llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp


Index: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
===================================================================
--- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -6,6 +6,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "AArch64Subtarget.h"
 #include "MCTargetDesc/AArch64AddressingModes.h"
 #include "MCTargetDesc/AArch64MCExpr.h"
 #include "MCTargetDesc/AArch64MCTargetDesc.h"
@@ -4705,7 +4706,8 @@
   // instruction for FP registers correctly in some rare circumstances. Convert
   // it to a safe instruction and warn (because silently changing someone's
   // assembly is rude).
-  if (getSTI().getFeatureBits()[AArch64::FeatureZCZeroingFPWorkaround] &&
+  if (static_cast<const AArch64Subtarget &>(getSTI())
+          .hasZeroCycleZeroingFPWorkaround() &&
       NumOperands == 4 && Tok == "movi") {
     AArch64Operand &Op1 = static_cast<AArch64Operand &>(*Operands[1]);
     AArch64Operand &Op2 = static_cast<AArch64Operand &>(*Operands[2]);


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