[PATCH] D66088: AMD Znver2 (Rome) Scheduler enablement

[Hal Finkel via Phabricator via llvm-commits]

hfinkel added inline comments.


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Comment at: llvm/lib/Target/X86/X86ScheduleZnver2.td:107
+def Zn2FPU     : ProcResGroup<[Zn2FPU0, Zn2FPU1, Zn2FPU2, Zn2FPU3]> {
+let BufferSize=36;
+}
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Indent.


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Comment at: llvm/lib/Target/X86/X86ScheduleZnver2.td:350
+defm : X86WriteResPairUnsupported<WriteFRcpZ>;
+//defm : Zn2WriteResFpuPair<WriteFRsqrt,    [Zn2FPU02], 5>;
+defm : Zn2WriteResFpuPair<WriteFRsqrtX,   [Zn2FPU01], 5, [1], 1, 7, 1>;
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Commented out?


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Comment at: llvm/lib/Target/X86/X86ScheduleZnver2.td:605
+def : SchedAlias<WriteIMul16Reg, Zn2WriteMul16>; // TODO: is this right?
+def : SchedAlias<WriteIMul16ImmLd, Zn2WriteMul16>; // TODO: this is definitely wrong but matches what the instregex did.
+def : SchedAlias<WriteIMul16RegLd, Zn2WriteMul16>; // TODO: this is definitely wrong but matches what the instregex did.
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Can this "definitely wrong" thing be fixed?


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Comment at: llvm/lib/Target/X86/X86ScheduleZnver2.td:628
+}
+//def : InstRW<[Zn2WriteMul32Ld, ReadAfterLd], (instrs IMUL32m, MUL32m)>;
+def : SchedAlias<WriteIMul32Ld, Zn2WriteMul32Ld>;
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Here, and below, some of these are commented out. Why? Can/should these just be removed?


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Comment at: llvm/lib/Target/X86/X86ScheduleZnver2.td:1194
+  let Latency = 2;
+//  let ResourceCycles = [2];
+}
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Commented out?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66088/new/

https://reviews.llvm.org/D66088