[llvm] r369580 - [RISCV] Fix use of side-effects in asserts in decoder functions

[Luis Marques via llvm-commits]

Author: luismarques
Date: Wed Aug 21 14:11:37 2019
New Revision: 369580

URL: http://llvm.org/viewvc/llvm-project?rev=369580&view=rev
Log:
[RISCV] Fix use of side-effects in asserts in decoder functions

Modified:
    llvm/trunk/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp

Modified: llvm/trunk/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp?rev=369580&r1=369579&r2=369580&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp Wed Aug 21 14:11:37 2019
@@ -303,8 +303,9 @@ static DecodeStatus decodeRVCInstrSImm(M
                                        uint64_t Address, const void *Decoder) {
   uint64_t SImm6 =
       fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5);
-  assert(decodeSImmOperand<6>(Inst, SImm6, Address, Decoder) ==
-      MCDisassembler::Success && "Invalid immediate");
+  DecodeStatus Result = decodeSImmOperand<6>(Inst, SImm6, Address, Decoder);
+  (void)Result;
+  assert(Result == MCDisassembler::Success && "Invalid immediate");
   (void)SImm6;
   return MCDisassembler::Success;
 }
@@ -315,8 +316,9 @@ static DecodeStatus decodeRVCInstrRdSImm
   DecodeGPRRegisterClass(Inst, 0, Address, Decoder);
   uint64_t SImm6 =
       fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5);
-  assert(decodeSImmOperand<6>(Inst, SImm6, Address, Decoder) ==
-      MCDisassembler::Success && "Invalid immediate");
+  DecodeStatus Result = decodeSImmOperand<6>(Inst, SImm6, Address, Decoder);
+  (void)Result;
+  assert(Result == MCDisassembler::Success && "Invalid immediate");
   (void)SImm6;
   return MCDisassembler::Success;
 }
@@ -328,8 +330,9 @@ static DecodeStatus decodeRVCInstrRdRs1U
   Inst.addOperand(Inst.getOperand(0));
   uint64_t UImm6 =
       fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5);
-  assert(decodeUImmOperand<6>(Inst, UImm6, Address, Decoder) ==
-      MCDisassembler::Success && "Invalid immediate");
+  DecodeStatus Result = decodeUImmOperand<6>(Inst, UImm6, Address, Decoder);
+  (void)Result;
+  assert(Result == MCDisassembler::Success && "Invalid immediate");
   (void)UImm6;
   return MCDisassembler::Success;
 }