[PATCH] D66163: [AArch64][GlobalISel] Select patterns which use shifted register operands
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 20 15:17:27 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL369460: [AArch64][GlobalISel] Select patterns which use shifted register operands (authored by paquette, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D66163?vs=214932&id=216267#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D66163/new/
https://reviews.llvm.org/D66163
Files:
llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td
llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-arith-shifted-reg.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-logical-shifted-reg.mir
llvm/trunk/test/CodeGen/AArch64/addsub-shifted.ll
llvm/trunk/test/CodeGen/AArch64/eon.ll
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