[llvm] r369084 - [X86] Manually reimplement getTargetInsertSubreg in X86DAGToDAGISel::matchBitExtract so we can call insertDAGNode on the target constant.

[Hans Wennborg via llvm-commits]

Merged to release_90 in r369357.

On Fri, Aug 16, 2019 at 6:46 AM Craig Topper via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>
> Author: ctopper
> Date: Thu Aug 15 21:47:44 2019
> New Revision: 369084
>
> URL: http://llvm.org/viewvc/llvm-project?rev=369084&view=rev
> Log:
> [X86] Manually reimplement getTargetInsertSubreg in X86DAGToDAGISel::matchBitExtract so we can call insertDAGNode on the target constant.
>
> This is needed to maintain the topological sort order.
>
> Fixes PR42992.
>
> Added:
>     llvm/trunk/test/CodeGen/X86/pr42992.ll
> Modified:
>     llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=369084&r1=369083&r2=369084&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Thu Aug 15 21:47:44 2019
> @@ -3333,8 +3333,12 @@ bool X86DAGToDAGISel::matchBitExtract(SD
>    SDValue ImplDef = SDValue(
>        CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, MVT::i32), 0);
>    insertDAGNode(*CurDAG, SDValue(Node, 0), ImplDef);
> -  NBits = CurDAG->getTargetInsertSubreg(X86::sub_8bit, DL, MVT::i32, ImplDef,
> -                                        NBits);
> +
> +  SDValue SRIdxVal = CurDAG->getTargetConstant(X86::sub_8bit, DL, MVT::i32);
> +  insertDAGNode(*CurDAG, SDValue(Node, 0), SRIdxVal);
> +  NBits = SDValue(
> +      CurDAG->getMachineNode(TargetOpcode::INSERT_SUBREG, DL, MVT::i32, ImplDef,
> +                             NBits, SRIdxVal), 0);
>    insertDAGNode(*CurDAG, SDValue(Node, 0), NBits);
>
>    if (Subtarget->hasBMI2()) {
>
> Added: llvm/trunk/test/CodeGen/X86/pr42992.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr42992.ll?rev=369084&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/pr42992.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/pr42992.ll Thu Aug 15 21:47:44 2019
> @@ -0,0 +1,17 @@
> +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
> +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=bmi2 | FileCheck %s
> +
> +define i32 @hoge(i32 %a) {
> +; CHECK-LABEL: hoge:
> +; CHECK:       # %bb.0: # %bb
> +; CHECK-NEXT:    movl $15, %eax
> +; CHECK-NEXT:    bzhil %edi, %eax, %eax
> +; CHECK-NEXT:    shll $8, %eax
> +; CHECK-NEXT:    retq
> +bb:
> +  %tmp3 = shl nsw i32 -1, %a
> +  %tmp4 = xor i32 %tmp3, -1
> +  %tmp5 = shl i32 %tmp4, 8
> +  %tmp6 = and i32 %tmp5, 3840
> +  ret i32 %tmp6
> +}
>
>
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