[lld] r369184 - [ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI

Fangrui Song via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 16 23:28:04 PDT 2019


Author: maskray
Date: Fri Aug 16 23:28:03 2019
New Revision: 369184

URL: http://llvm.org/viewvc/llvm-project?rev=369184&view=rev
Log:
[ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI

Fixes https://github.com/ClangBuiltLinux/linux/issues/640

R_PPC64_REL16_HI was incorrectly computed as an R_ABS relocation.
rLLD368964 made it a linker failure. Change it to use R_PC to fix the
failures.

Add ppc64-reloc-rel.s for these R_PPC64_REL* tests.

Added:
    lld/trunk/test/ELF/ppc64-reloc-rel.s
Modified:
    lld/trunk/ELF/Arch/PPC64.cpp
    lld/trunk/test/ELF/ppc64-relocs.s

Modified: lld/trunk/ELF/Arch/PPC64.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/PPC64.cpp?rev=369184&r1=369183&r2=369184&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/PPC64.cpp (original)
+++ lld/trunk/ELF/Arch/PPC64.cpp Fri Aug 16 23:28:03 2019
@@ -573,6 +573,7 @@ RelExpr PPC64::getRelExpr(RelType type,
     return R_PPC64_CALL_PLT;
   case R_PPC64_REL16_LO:
   case R_PPC64_REL16_HA:
+  case R_PPC64_REL16_HI:
   case R_PPC64_REL32:
   case R_PPC64_REL64:
     return R_PC;

Added: lld/trunk/test/ELF/ppc64-reloc-rel.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/ppc64-reloc-rel.s?rev=369184&view=auto
==============================================================================
--- lld/trunk/test/ELF/ppc64-reloc-rel.s (added)
+++ lld/trunk/test/ELF/ppc64-reloc-rel.s Fri Aug 16 23:28:03 2019
@@ -0,0 +1,58 @@
+# REQUIRES: ppc
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t.o
+# RUN: ld.lld %t.o --defsym=foo=rel16+0x8000 -o %t
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
+# RUN: llvm-readobj -r %t.o | FileCheck --check-prefix=REL %s
+# RUN: llvm-readelf -S %t | FileCheck --check-prefix=SEC %s
+# RUN: llvm-readelf -x .eh_frame %t | FileCheck --check-prefix=HEX %s
+
+.section .R_PPC64_REL14,"ax", at progbits
+# FIXME This does not produce a relocation
+  beq 1f
+1:
+# CHECK-LABEL: Disassembly of section .R_PPC64_REL14:
+# CHECK: bt 2, .+4
+
+.section .R_PPC64_REL16,"ax", at progbits
+.globl rel16
+rel16:
+  li 3, foo-rel16-1 at ha      # R_PPC64_REL16_HA
+  li 3, foo-rel16 at ha
+  li 4, foo-rel16+0x7fff at h  # R_PPC64_REL16_HI
+  li 4, foo-rel16+0x8000 at h
+  li 5, foo-rel16-1 at l       # R_PPC64_REL16_LO
+  li 5, foo-rel16 at l
+# CHECK-LABEL: Disassembly of section .R_PPC64_REL16:
+# CHECK:      li 3, 0
+# CHECK-NEXT: li 3, 1
+# CHECK-NEXT: li 4, 0
+# CHECK-NEXT: li 4, 1
+# CHECK-NEXT: li 5, 32767
+# CHECK-NEXT: li 5, -32768
+
+.section .R_PPC64_REL24,"ax", at progbits
+  b rel16
+# CHECK-LABEL: Disassembly of section .R_PPC64_REL24:
+# CHECK: b .+67108840
+
+.section .REL32_AND_REL64,"ax", at progbits
+  .cfi_startproc
+  .cfi_personality 148, rel64
+  nop
+  .cfi_endproc
+rel64:
+  li 3, 0
+# REL:      .rela.eh_frame {
+# REL-NEXT:   0x12 R_PPC64_REL64 .REL32_AND_REL64 0x4
+# REL-NEXT:   0x28 R_PPC64_REL32 .REL32_AND_REL64 0x0
+# REL-NEXT: }
+
+# SEC: .REL32_AND_REL64 PROGBITS 0000000010010020
+
+## CIE Personality Address: 0x10010020-(0x10000168+2)+4 = 0xfeba
+## FDE PC Begin: 0x10010020-(0x10000178+8) = 0xfea0
+# HEX:      section '.eh_frame':
+# HEX-NEXT: 0x10000158
+# HEX-NEXT: 0x10000168 {{....}}bafe 00000000
+# HEX-NEXT: 0x10000178 {{[0-9a-f]+}} {{[0-9a-f]+}} a0fe0000

Modified: lld/trunk/test/ELF/ppc64-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/ppc64-relocs.s?rev=369184&r1=369183&r2=369184&view=diff
==============================================================================
--- lld/trunk/test/ELF/ppc64-relocs.s (original)
+++ lld/trunk/test/ELF/ppc64-relocs.s Fri Aug 16 23:28:03 2019
@@ -18,16 +18,9 @@ _start:
 	li      3,42
 	sc
 
-.section        .rodata,"a", at progbits
-        .p2align        2
-.LJTI0_0:
-        .long   .LBB0_2-.LJTI0_0
-
-.section        .toc,"aw", at progbits
+.section .toc,"aw", at progbits
 .L1:
-.quad           22, 37, 89, 47
-.LC0:
-        .tc .LJTI0_0[TC],.LJTI0_0
+  .quad 22, 37, 89, 47
 
 .section .R_PPC64_TOC16_LO_DS,"ax", at progbits
   ld 1, .L1 at toc@l(2)
@@ -53,91 +46,47 @@ _start:
 # CHECK-LABEL: Disassembly of section .R_PPC64_TOC16_HA:
 # CHECK: 10010018:       addis 1, 2, 0
 
-.section .R_PPC64_REL24,"ax", at progbits
-  b 1f
-1:
-
-# CHECK-LABEL: Disassembly of section .R_PPC64_REL24:
-# CHECK: 1001001c:       b .+4
-
-.section .R_PPC64_REL14,"ax", at progbits
-  beq 1f
-1:
-
-# CHECK-LABEL: Disassembly of section .R_PPC64_REL14:
-# CHECK: 10010020:       bt 2, .+4
-
 .section .R_PPC64_ADDR16_LO,"ax", at progbits
   li 1, .Lfoo at l
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_LO:
-# CHECK: 10010024:       li 1, 0
+# CHECK: li 1, 0
 
 .section .R_PPC64_ADDR16_HI,"ax", at progbits
   li 1, .Lfoo at h
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HI:
-# CHECK: 10010028:       li 1, 4097
+# CHECK: li 1, 4097
 
 .section .R_PPC64_ADDR16_HA,"ax", at progbits
   li 1, .Lfoo at ha
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HA:
-# CHECK: 1001002c:       li 1, 4097
+# CHECK: li 1, 4097
 
 .section .R_PPC64_ADDR16_HIGHER,"ax", at progbits
   li 1, .Lfoo at higher
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HIGHER:
-# CHECK: 10010030:       li 1, 0
+# CHECK: li 1, 0
 
 .section .R_PPC64_ADDR16_HIGHERA,"ax", at progbits
   li 1, .Lfoo at highera
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HIGHERA:
-# CHECK: 10010034:       li 1, 0
+# CHECK: li 1, 0
 
 .section .R_PPC64_ADDR16_HIGHEST,"ax", at progbits
   li 1, .Lfoo at highest
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HIGHEST:
-# CHECK: 10010038:       li 1, 0
+# CHECK: li 1, 0
 
 .section .R_PPC64_ADDR16_HIGHESTA,"ax", at progbits
   li 1, .Lfoo at highesta
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HIGHESTA:
-# CHECK: 1001003c:       li 1, 0
-
-.section  .R_PPC64_REL32, "ax", at progbits
-  addis 5, 2, .LC0 at toc@ha
-  ld 5, .LC0 at toc@l(5)
-.LBB0_2:
-  add 3, 3, 4
-
-# DATALE: '.rodata':
-# DATALE: 0x100001c8 80fe0000
-
-# DATABE: '.rodata':
-# DATABE: 0x100001c8 0000fe80
-
-# Address of rodata + value stored at rodata entry
-# should equal address of LBB0_2.
-# 0x10000190 + 0xfeb4 = 0x10010044
-# CHECK-LABEL: Disassembly of section .R_PPC64_REL32:
-# CHECK: 10010040:       addis 5, 2, 0
-# CHECK: 10010044:       ld 5, -32736(5)
-# CHECK: 10010048:       add 3, 3, 4
-
-.section .R_PPC64_REL64, "ax", at progbits
-        .cfi_startproc
-        .cfi_personality 148, __foo
-        li 0, 1
-        li 3, 55
-        sc
-        .cfi_endproc
-__foo:
-  li 3,0
+# CHECK: li 1, 0
 
 .section .R_PPC64_TOC,"a", at progbits
   .quad .TOC. at tocbase
@@ -150,15 +99,3 @@ __foo:
 
 # DATABE-LABEL: section '.R_PPC64_TOC':
 # DATABE: 00000000 10028000
-
-# Check that the personality (relocated by R_PPC64_REL64) in the .eh_frame
-# equals the address of __foo.
-# 0x100001ea + 0xfe6e = 0x10010058
-# DATALE: section '.eh_frame':
-# DATALE: 0x100001e8 {{....}}6efe
-
-# DATABE: section '.eh_frame':
-# DATABE: 0x100001e8 {{[0-9a-f]+ [0-9a-f]+}} fe6e{{....}}
-
-# CHECK: __foo
-# CHECK-NEXT: 10010058:       li 3, 0




More information about the llvm-commits mailing list