[PATCH] D64665: [MachinePipeliner] Refactor schedule emission logic
Jinsong Ji via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 16 10:21:02 PDT 2019
yes, but just to clarify, 4 of 14, I did not try whole SPEC2017.
Best,
Jinsong Ji (纪金松), PhD.
XL/LLVM on Power Compiler Development
E-mail: jji at us.ibm.com
From: James Molloy <jmolloy at google.com>
To: reviews+D64665+public+6971cdf24f5c9ab4 at reviews.llvm.org
Cc: Brendon Cahoon <bcahoon at quicinc.com>, Jinsong Ji
<jji at us.ibm.com>, david.majnemer at gmail.com, wuzish at cn.ibm.com,
nemanja.i.ibm at gmail.com, mgorny at gentoo.org, Fangrui Song
<maskray at google.com>, Matthew.Arsenault at amd.com,
hfinkel at anl.gov, llvm-commits at lists.llvm.org,
jun.l at samsung.com, florian_hahn at apple.com
Date: 08/16/2019 12:55 PM
Subject: [EXTERNAL] Re: [PATCH] D64665: [MachinePipeliner] Refactor
schedule emission logic
Thanks! 4 failures in the whole of SPEC2017 is pretty promising!
On Fri, 16 Aug 2019 at 08:01, Jinsong Ji via Phabricator <
reviews at reviews.llvm.org> wrote:
jsji added a comment.
Gave it a try on SPEC2017 with `-O3 -mcpu=native -mllvm
--ppc-enable-pipeliner` on P9 <https://reviews.llvm.org/P9>,
500.perlbench_r, 525.x264_r , 531.deepsjeng_r, 557.xz_r failed with new
cg, pass with old cg.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D64665/new/
https://reviews.llvm.org/D64665
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