[PATCH] D66228: [mips] Fix 64-bit address loading in case of applying 32-bit mask to the result
Petar Avramovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 16 04:25:53 PDT 2019
Petar.Avramovic added a comment.
In getAddrNonPICSym64 Relocation looks to come from another SDValue (Hi bellow)
MipsISD::Hi doesn't seem to be connected with any of the target flags (like MipsII::MO_ABS_HI)
SDValue Shift = DAG.getNode(ISD::SHL ...
SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI); <-Relocation
SDValue Add = DAG.getNode(ISD::ADD, DL, Ty, Shift, <-Add should become Daddiu when combined with MipsISD::Hi node(below) and SDValue Hi (above)
DAG.getNode(MipsISD::Hi, DL, Ty, Hi)); <-Glue Node, pattern matches immediate daddiu instead of ordinary daddu. This can be whatever as long as these three nodes give Daddiu with imm that is defined in SDValue Hi(MipsISD::Lo also works)
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https://reviews.llvm.org/D66228/new/
https://reviews.llvm.org/D66228
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