[llvm] r369050 - [MemorySSA] Remove restrictive asserts.
Alina Sbirlea via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 15 14:20:08 PDT 2019
Author: asbirlea
Date: Thu Aug 15 14:20:08 2019
New Revision: 369050
URL: http://llvm.org/viewvc/llvm-project?rev=369050&view=rev
Log:
[MemorySSA] Remove restrictive asserts.
The verification I added has overly restrictive asserts.
Unreachable blocks can have any incoming value in practice, after an
update due to a "replaceAllUses" call when the repalced entry is
LiveOnEntry.
Modified:
llvm/trunk/lib/Analysis/MemorySSA.cpp
Modified: llvm/trunk/lib/Analysis/MemorySSA.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemorySSA.cpp?rev=369050&r1=369049&r2=369050&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemorySSA.cpp (original)
+++ llvm/trunk/lib/Analysis/MemorySSA.cpp Thu Aug 15 14:20:08 2019
@@ -1886,8 +1886,6 @@ void MemorySSA::verifyPrevDefInPhis(Func
}
DTNode = DTNode->getIDom();
}
- assert((DTNode || IncAcc == getLiveOnEntryDef()) &&
- "Expected LoE inc");
} else if (auto *DefList = getBlockDefs(Pred)) {
// If Pred has unreachable predecessors, but has at least a Def, the
// incoming access can be the last Def in Pred, or it could have been
@@ -1897,8 +1895,7 @@ void MemorySSA::verifyPrevDefInPhis(Func
"Incorrect incoming access into phi.");
} else {
// If Pred has unreachable predecessors and no Defs, incoming access
- // should be LoE.
- assert(IncAcc == getLiveOnEntryDef() && "Expected LoE inc");
+ // should be LoE; In practice, after an update, it may be any access.
}
}
}
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