[PATCH] D65950: [RISCV] Add Option for Printing Architectural Register Names

[Luís Marques via Phabricator via llvm-commits]

luismarques added inline comments.


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Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp:44
+    ArchRegNames("riscv-arch-reg-names",
+                 cl::desc("Print architectural register names such as x0-x31 "
+                          "rather than the ABI name"),
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Giving an example ("such as") and providing a range ("x0-x31", which tends to suggest it describes the range of possibilities) seems a bit of a weird mismatch. Some possible alternatives:
- "such as x0"
- "such as x0, f8, v3..."
- "such as x2, instead of sp"?


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Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h:51
                                const MCSubtargetInfo &STI, raw_ostream &O);
-  static const char *getRegisterName(unsigned RegNo,
-                                     unsigned AltIdx = RISCV::ABIRegAltName);
+  static const char *getRegisterName(unsigned RegNo);
+  static const char *getRegisterName(unsigned RegNo, unsigned AltIdx);
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Does this fall under the umbrella of the `unsigned` -> `Register` type transition? If so, please update the patch accordingly. (Apply the comment to the other cases in this patch).


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D65950/new/

https://reviews.llvm.org/D65950