[PATCH] D65653: [AArch64] Change location of frame-record within callee-save area.

Tue Aug 13 16:45:07 PDT 2019

efriedma added inline comments.

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Comment at: lib/Target/AArch64/AArch64CallingConvention.td:342
+def CSR_Win_AArch64_AAPCS : CalleeSavedRegs<(add X19, X20, X21, X22, X23, X24,
+                                               X25, X26, X27, X28, FP, LR,
                                                D8, D9, D10, D11,
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Is the order of the registers in this list important?  If it is, should we explain it in a comment somewhere?

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Comment at: test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll:583
+; CHECK: stp	x29, x30, [sp, #-32]!
+; CHECK: str  x19, [sp, #16]
 ;   Check that the frame pointer is created:
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I don't understand what's happening here; are we reducing register pressure somhow?

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65653/new/

https://reviews.llvm.org/D65653