[PATCH] D66163: [AArch64][GlobalISel] Select patterns which use shifted register operands

[Jessica Paquette via Phabricator via llvm-commits]

paquette updated this revision to Diff 214932.
paquette marked 2 inline comments as done.
paquette added a comment.

Improve LHS test cases and simplify NumBits calculation


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66163/new/

https://reviews.llvm.org/D66163

Files:
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/select-arith-shifted-reg.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-logical-shifted-reg.mir
  llvm/test/CodeGen/AArch64/addsub-shifted.ll
  llvm/test/CodeGen/AArch64/eon.ll

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