[PATCH] D65366: [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 13 03:08:03 PDT 2019
lebedev.ri marked an inline comment as done.
lebedev.ri added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:4964
+ const SDLoc &DL) const {
+ SmallVector<SDNode *, 2> Built;
+ if (SDValue Folded = prepareSREMEqFold(SETCCVT, REMNode, CompTargetNode, Cond,
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This should be `SmallVector<SDNode *, 3>`, will fix during next update.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D65366/new/
https://reviews.llvm.org/D65366
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