[llvm] r368418 - AArch64: support TLS on Darwin platforms in GlobalISel.
Amara Emerson via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 12 23:56:29 PDT 2019
Hi Tim,
> On Aug 9, 2019, at 2:32 AM, Tim Northover via llvm-commits <llvm-commits at lists.llvm.org> wrote:
>
> Author: tnorthover
> Date: Fri Aug 9 02:32:38 2019
> New Revision: 368418
>
> URL: http://llvm.org/viewvc/llvm-project?rev=368418&view=rev
> Log:
> AArch64: support TLS on Darwin platforms in GlobalISel.
>
> All TLS access on Darwin is in the "general dynamic" form where we call
> a function to resolve the address, so implementation is pretty simple.
>
> Modified:
> llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
> llvm/trunk/test/CodeGen/AArch64/arm64-tls-darwin.ll
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=368418&r1=368417&r2=368418&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp Fri Aug 9 02:32:38 2019
> @@ -121,6 +121,7 @@ private:
> bool selectIntrinsicRound(MachineInstr &I, MachineRegisterInfo &MRI) const;
> bool selectJumpTable(MachineInstr &I, MachineRegisterInfo &MRI) const;
> bool selectBrJT(MachineInstr &I, MachineRegisterInfo &MRI) const;
> + bool selectTLSGlobalValue(MachineInstr &I, MachineRegisterInfo &MRI) const;
>
> unsigned emitConstantPoolEntry(Constant *CPVal, MachineFunction &MF) const;
> MachineInstr *emitLoadFromConstantPool(Constant *CPVal,
> @@ -1690,10 +1691,9 @@ bool AArch64InstructionSelector::select(
>
> case TargetOpcode::G_GLOBAL_VALUE: {
> auto GV = I.getOperand(1).getGlobal();
> - if (GV->isThreadLocal()) {
> - // FIXME: we don't support TLS yet.
> - return false;
> - }
> + if (GV->isThreadLocal())
> + return selectTLSGlobalValue(I, MRI);
> +
> unsigned OpFlags = STI.ClassifyGlobalReference(GV, TM);
> if (OpFlags & AArch64II::MO_GOT) {
> I.setDesc(TII.get(AArch64::LOADgot));
> @@ -2361,6 +2361,36 @@ bool AArch64InstructionSelector::selectJ
> return constrainSelectedInstRegOperands(*MovMI, TII, TRI, RBI);
> }
>
> +bool AArch64InstructionSelector::selectTLSGlobalValue(
> + MachineInstr &I, MachineRegisterInfo &MRI) const {
> + if (!STI.isTargetMachO())
> + return false;
> + MachineFunction &MF = *I.getParent()->getParent();
> + MF.getFrameInfo().setAdjustsStack(true);
> +
> + const GlobalValue &GV = *I.getOperand(1).getGlobal();
> + MachineIRBuilder MIB(I);
> +
> + MIB.buildInstr(AArch64::LOADgot, {AArch64::X0}, {})
> + .addGlobalAddress(&GV, 0, AArch64II::MO_TLS);
> +
> + Register DestReg = MRI.createVirtualRegister(&AArch64::GPR64commonRegClass);
> + MIB.buildInstr(AArch64::LDRXui, {DestReg}, {Register(AArch64::X0)}).addImm(0);
For future conciseness, you can just directly pass the regclass to the SrcOp in the buildInstr call. Saves having to create a vreg manually, I’ve done this change in r368653.
> +
> + // TLS calls preserve all registers except those that absolutely must be
> + // trashed: X0 (it takes an argument), LR (it's a call) and NZCV (let's not be
> + // silly).
> + MIB.buildInstr(AArch64::BLR, {}, {DestReg})
> + .addDef(AArch64::X0, RegState::Implicit)
> + .addRegMask(TRI.getTLSCallPreservedMask());
> +
> + MIB.buildCopy(I.getOperand(0).getReg(), Register(AArch64::X0));
> + RBI.constrainGenericRegister(I.getOperand(0).getReg(), AArch64::GPR64RegClass,
> + MRI);
> + I.eraseFromParent();
> + return true;
> +}
> +
> bool AArch64InstructionSelector::selectIntrinsicTrunc(
> MachineInstr &I, MachineRegisterInfo &MRI) const {
> const LLT SrcTy = MRI.getType(I.getOperand(0).getReg());
>
> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-tls-darwin.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-tls-darwin.ll?rev=368418&r1=368417&r2=368418&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/arm64-tls-darwin.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/arm64-tls-darwin.ll Fri Aug 9 02:32:38 2019
> @@ -1,4 +1,5 @@
> ; RUN: llc -mtriple=arm64-apple-ios7.0 %s -o - | FileCheck %s
> +; RUN: llc -mtriple=arm64-apple-ios7.0 -global-isel -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s
>
> @var = thread_local global i8 0
>
>
>
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