[PATCH] D65840: [X86] Support -march=tigerlake

[Xiang Zhang via Phabricator via llvm-commits]

xiangzhangllvm marked 3 inline comments as done.
xiangzhangllvm added inline comments.


================
Comment at: clang/test/Preprocessor/predefined-arch-macros.c:1571
+// CHECK_TGL_M32-NOT: #define __WBNOINVD__ 1
+// CHECK_TGL_M32-NOT: #define __PCONFIG__ 1
+// CHECK_TGL_M32: #define __XSAVEC__ 1
----------------
craig.topper wrote:
> This is only effective if its alphabetically where PCONFIG should be.
Yes!


================
Comment at: llvm/include/llvm/Support/X86TargetParser.def:164
 X86_FEATURE_COMPAT(35, FEATURE_AVX512BITALG,    "avx512bitalg")
+X86_FEATURE_COMPAT(36, FEATURE_AVX512VP2INTERSECT, "avx512vp2intersect")
 // Features below here are not in libgcc/compiler-rt.
----------------
craig.topper wrote:
> The COMPAT macro is for things implemented in libgcc. I don't know if this one is yet. So it should be at position 70 instead.
Make sense!


================
Comment at: llvm/lib/Support/Host.cpp:750
+      // TODO detect tigerlake host
+      if (Features & (1 << X86::FEATURE_AVX512VP2INTERSECT)) {
+        *Type = X86::INTEL_COREI7;
----------------
craig.topper wrote:
> There 3 variables Features, Features2, and Feature3. Each are 32 bits. The current bit position you have would put it in Features2, but when you move it to 70 it will be Features3.
Oh! Yes! I ignored it! Thank you very much!!


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65840/new/

https://reviews.llvm.org/D65840