[llvm] r368324 - [X86] Make CMPXCHG16B feature imply CMPXCHG8B feature.

[Hans Wennborg via llvm-commits]

Merged to release_90 in r368423.

On Thu, Aug 8, 2019 at 8:10 PM Craig Topper via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>
> Author: ctopper
> Date: Thu Aug  8 11:11:17 2019
> New Revision: 368324
>
> URL: http://llvm.org/viewvc/llvm-project?rev=368324&view=rev
> Log:
> [X86] Make CMPXCHG16B feature imply CMPXCHG8B feature.
>
> This fixes znver1 so that it properly enables CMPXHG8B. We can
> probably remove explicit CMPXCHG8B from CPUs that also have
> CMPXCHG16B, but keeping this simple to allow cherry pick to 9.0.
>
> Fixes PR42935.
>
> Modified:
>     llvm/trunk/lib/Target/X86/X86.td
>     llvm/trunk/test/CodeGen/X86/cmpxchg8b.ll
>
> Modified: llvm/trunk/lib/Target/X86/X86.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=368324&r1=368323&r2=368324&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86.td (original)
> +++ llvm/trunk/lib/Target/X86/X86.td Thu Aug  8 11:11:17 2019
> @@ -95,7 +95,8 @@ def Feature3DNowA  : SubtargetFeature<"3
>  def Feature64Bit   : SubtargetFeature<"64bit", "HasX86_64", "true",
>                                        "Support 64-bit instructions">;
>  def FeatureCMPXCHG16B : SubtargetFeature<"cx16", "HasCmpxchg16b", "true",
> -                                      "64-bit with cmpxchg16b">;
> +                                      "64-bit with cmpxchg16b",
> +                                      [FeatureCMPXCHG8B]>;
>  def FeatureSlowSHLD : SubtargetFeature<"slow-shld", "IsSHLDSlow", "true",
>                                         "SHLD instruction is slow">;
>  def FeatureSlowPMULLD : SubtargetFeature<"slow-pmulld", "IsPMULLDSlow", "true",
>
> Modified: llvm/trunk/test/CodeGen/X86/cmpxchg8b.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmpxchg8b.ll?rev=368324&r1=368323&r2=368324&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/cmpxchg8b.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/cmpxchg8b.ll Thu Aug  8 11:11:17 2019
> @@ -2,6 +2,7 @@
>  ; RUN: llc < %s -mtriple=i686-unknown- -mcpu=core2 | FileCheck %s --check-prefixes=CHECK,X86
>  ; RUN: llc < %s -mtriple=x86_64-unknown- -mcpu=core2 | FileCheck %s --check-prefixes=CHECK,X64
>  ; RUN: llc < %s -mtriple=i686-unknown- -mcpu=i486 | FileCheck %s --check-prefixes=I486
> +; RUN: llc < %s -mtriple=i686-unknown- -mcpu=znver1 | FileCheck %s --check-prefixes=CHECK,X86
>
>  ; Basic 64-bit cmpxchg
>  define void @t1(i64* nocapture %p) nounwind ssp {
>
>
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