[llvm] r367750 - Emit diagnostic if an inline asm constraint requires an immediate
Hans Wennborg via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 9 02:48:37 PDT 2019
Merged to release_90 in r368421.
On Sat, Aug 3, 2019 at 7:51 AM Bill Wendling via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>
> Author: void
> Date: Fri Aug 2 22:52:47 2019
> New Revision: 367750
>
> URL: http://llvm.org/viewvc/llvm-project?rev=367750&view=rev
> Log:
> Emit diagnostic if an inline asm constraint requires an immediate
>
> Summary:
> An inline asm call can result in an immediate after inlining. Therefore emit a
> diagnostic here if constraint requires an immediate but one isn't supplied.
>
> Reviewers: joerg, mgorny, efriedma, rsmith
>
> Reviewed By: joerg
>
> Subscribers: asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, s.egerton, MaskRay, jyknight, dylanmckay, javed.absar, fedor.sergeev, jrtc27, Jim, krytarowski, eraman, llvm-commits
>
> Tags: #llvm
>
> Differential Revision: https://reviews.llvm.org/D60942
>
> Added:
> llvm/trunk/test/CodeGen/X86/inline-asm-e-constraint.ll
> llvm/trunk/test/CodeGen/X86/inline-asm-imm-out-of-range.ll
> llvm/trunk/test/CodeGen/X86/inline-asm-n-constraint.ll
> Modified:
> llvm/trunk/include/llvm/CodeGen/TargetLowering.h
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
> llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
> llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp
> llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
> llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
> llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-I.ll
> llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-J.ll
> llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-K.ll
> llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-L.ll
> llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-M.ll
> llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-N.ll
> llvm/trunk/test/CodeGen/RISCV/inline-asm-invalid.ll
> llvm/trunk/test/CodeGen/X86/inline-asm-bad-constraint-n.ll
>
> Modified: llvm/trunk/include/llvm/CodeGen/TargetLowering.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/TargetLowering.h?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/TargetLowering.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/TargetLowering.h Fri Aug 2 22:52:47 2019
> @@ -3742,6 +3742,7 @@ public:
> C_Register, // Constraint represents specific register(s).
> C_RegisterClass, // Constraint represents any of register(s) in class.
> C_Memory, // Memory constraint.
> + C_Immediate, // Requires an immediate.
> C_Other, // Something else.
> C_Unknown // Unsupported constraint.
> };
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Fri Aug 2 22:52:47 2019
> @@ -8049,6 +8049,14 @@ void SelectionDAGBuilder::visitInlineAsm
> // Compute the constraint code and ConstraintType to use.
> TLI.ComputeConstraintToUse(T, SDValue());
>
> + if (T.ConstraintType == TargetLowering::C_Immediate &&
> + OpInfo.CallOperand && !isa<ConstantSDNode>(OpInfo.CallOperand))
> + // We've delayed emitting a diagnostic like the "n" constraint because
> + // inlining could cause an integer showing up.
> + return emitInlineAsmError(
> + CS, "constraint '" + Twine(T.ConstraintCode) + "' expects an "
> + "integer constant expression");
> +
> ExtraInfo.update(T);
> }
>
> @@ -8133,7 +8141,8 @@ void SelectionDAGBuilder::visitInlineAsm
> switch (OpInfo.Type) {
> case InlineAsm::isOutput:
> if (OpInfo.ConstraintType == TargetLowering::C_Memory ||
> - (OpInfo.ConstraintType == TargetLowering::C_Other &&
> + ((OpInfo.ConstraintType == TargetLowering::C_Immediate ||
> + OpInfo.ConstraintType == TargetLowering::C_Other) &&
> OpInfo.isIndirect)) {
> unsigned ConstraintID =
> TLI.getInlineAsmMemConstraint(OpInfo.ConstraintCode);
> @@ -8147,13 +8156,14 @@ void SelectionDAGBuilder::visitInlineAsm
> MVT::i32));
> AsmNodeOperands.push_back(OpInfo.CallOperand);
> break;
> - } else if ((OpInfo.ConstraintType == TargetLowering::C_Other &&
> + } else if (((OpInfo.ConstraintType == TargetLowering::C_Immediate ||
> + OpInfo.ConstraintType == TargetLowering::C_Other) &&
> !OpInfo.isIndirect) ||
> OpInfo.ConstraintType == TargetLowering::C_Register ||
> OpInfo.ConstraintType == TargetLowering::C_RegisterClass) {
> // Otherwise, this outputs to a register (directly for C_Register /
> - // C_RegisterClass, and a target-defined fashion for C_Other). Find a
> - // register that we can use.
> + // C_RegisterClass, and a target-defined fashion for
> + // C_Immediate/C_Other). Find a register that we can use.
> if (OpInfo.AssignedRegs.Regs.empty()) {
> emitInlineAsmError(
> CS, "couldn't allocate output register for constraint '" +
> @@ -8233,15 +8243,24 @@ void SelectionDAGBuilder::visitInlineAsm
> }
>
> // Treat indirect 'X' constraint as memory.
> - if (OpInfo.ConstraintType == TargetLowering::C_Other &&
> + if ((OpInfo.ConstraintType == TargetLowering::C_Immediate ||
> + OpInfo.ConstraintType == TargetLowering::C_Other) &&
> OpInfo.isIndirect)
> OpInfo.ConstraintType = TargetLowering::C_Memory;
>
> - if (OpInfo.ConstraintType == TargetLowering::C_Other) {
> + if (OpInfo.ConstraintType == TargetLowering::C_Immediate ||
> + OpInfo.ConstraintType == TargetLowering::C_Other) {
> std::vector<SDValue> Ops;
> TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode,
> Ops, DAG);
> if (Ops.empty()) {
> + if (OpInfo.ConstraintType == TargetLowering::C_Immediate)
> + if (isa<ConstantSDNode>(InOperandVal)) {
> + emitInlineAsmError(CS, "value out of range for constraint '" +
> + Twine(OpInfo.ConstraintCode) + "'");
> + return;
> + }
> +
> emitInlineAsmError(CS, "invalid operand for inline asm constraint '" +
> Twine(OpInfo.ConstraintCode) + "'");
> return;
> @@ -8278,7 +8297,8 @@ void SelectionDAGBuilder::visitInlineAsm
> }
>
> assert((OpInfo.ConstraintType == TargetLowering::C_RegisterClass ||
> - OpInfo.ConstraintType == TargetLowering::C_Register) &&
> + OpInfo.ConstraintType == TargetLowering::C_Register ||
> + OpInfo.ConstraintType == TargetLowering::C_Immediate) &&
> "Unknown constraint type!");
>
> // TODO: Support this.
> @@ -8384,6 +8404,7 @@ void SelectionDAGBuilder::visitInlineAsm
> Val = OpInfo.AssignedRegs.getCopyFromRegs(
> DAG, FuncInfo, getCurSDLoc(), Chain, &Flag, CS.getInstruction());
> break;
> + case TargetLowering::C_Immediate:
> case TargetLowering::C_Other:
> Val = TLI.LowerAsmOutputForConstraint(Chain, Flag, getCurSDLoc(),
> OpInfo, DAG);
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Fri Aug 2 22:52:47 2019
> @@ -3873,15 +3873,17 @@ TargetLowering::getConstraintType(String
> if (S == 1) {
> switch (Constraint[0]) {
> default: break;
> - case 'r': return C_RegisterClass;
> + case 'r':
> + return C_RegisterClass;
> case 'm': // memory
> case 'o': // offsetable
> case 'V': // not offsetable
> return C_Memory;
> - case 'i': // Simple Integer or Relocatable Constant
> case 'n': // Simple Integer
> case 'E': // Floating Point Constant
> case 'F': // Floating Point Constant
> + return C_Immediate;
> + case 'i': // Simple Integer or Relocatable Constant
> case 's': // Relocatable Constant
> case 'p': // Address.
> case 'X': // Allow ANY value.
> @@ -4256,6 +4258,7 @@ TargetLowering::ParseConstraints(const D
> /// Return an integer indicating how general CT is.
> static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
> switch (CT) {
> + case TargetLowering::C_Immediate:
> case TargetLowering::C_Other:
> case TargetLowering::C_Unknown:
> return 0;
> @@ -4375,11 +4378,12 @@ static void ChooseConstraint(TargetLower
> TargetLowering::ConstraintType CType =
> TLI.getConstraintType(OpInfo.Codes[i]);
>
> - // If this is an 'other' constraint, see if the operand is valid for it.
> - // For example, on X86 we might have an 'rI' constraint. If the operand
> - // is an integer in the range [0..31] we want to use I (saving a load
> - // of a register), otherwise we must use 'r'.
> - if (CType == TargetLowering::C_Other && Op.getNode()) {
> + // If this is an 'other' or 'immediate' constraint, see if the operand is
> + // valid for it. For example, on X86 we might have an 'rI' constraint. If
> + // the operand is an integer in the range [0..31] we want to use I (saving a
> + // load of a register), otherwise we must use 'r'.
> + if ((CType == TargetLowering::C_Other ||
> + CType == TargetLowering::C_Immediate) && Op.getNode()) {
> assert(OpInfo.Codes[i].size() == 1 &&
> "Unhandled multi-letter 'other' constraint");
> std::vector<SDValue> ResultOps;
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Fri Aug 2 22:52:47 2019
> @@ -5686,8 +5686,6 @@ AArch64TargetLowering::getConstraintType
> switch (Constraint[0]) {
> default:
> break;
> - case 'z':
> - return C_Other;
> case 'x':
> case 'w':
> return C_RegisterClass;
> @@ -5695,6 +5693,16 @@ AArch64TargetLowering::getConstraintType
> // currently handle addresses it is the same as 'r'.
> case 'Q':
> return C_Memory;
> + case 'I':
> + case 'J':
> + case 'K':
> + case 'L':
> + case 'M':
> + case 'N':
> + case 'Y':
> + case 'Z':
> + return C_Immediate;
> + case 'z':
> case 'S': // A symbolic address
> return C_Other;
> }
>
> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Aug 2 22:52:47 2019
> @@ -14976,7 +14976,8 @@ const char *ARMTargetLowering::LowerXCon
> /// constraint it is for this target.
> ARMTargetLowering::ConstraintType
> ARMTargetLowering::getConstraintType(StringRef Constraint) const {
> - if (Constraint.size() == 1) {
> + unsigned S = Constraint.size();
> + if (S == 1) {
> switch (Constraint[0]) {
> default: break;
> case 'l': return C_RegisterClass;
> @@ -14984,12 +14985,12 @@ ARMTargetLowering::getConstraintType(Str
> case 'h': return C_RegisterClass;
> case 'x': return C_RegisterClass;
> case 't': return C_RegisterClass;
> - case 'j': return C_Other; // Constant for movw.
> - // An address with a single base register. Due to the way we
> - // currently handle addresses it is the same as an 'r' memory constraint.
> + case 'j': return C_Immediate; // Constant for movw.
> + // An address with a single base register. Due to the way we
> + // currently handle addresses it is the same as an 'r' memory constraint.
> case 'Q': return C_Memory;
> }
> - } else if (Constraint.size() == 2) {
> + } else if (S == 2) {
> switch (Constraint[0]) {
> default: break;
> case 'T': return C_RegisterClass;
>
> Modified: llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp Fri Aug 2 22:52:47 2019
> @@ -1689,6 +1689,8 @@ AVRTargetLowering::getConstraintType(Str
> if (Constraint.size() == 1) {
> // See http://www.nongnu.org/avr-libc/user-manual/inline_asm.html
> switch (Constraint[0]) {
> + default:
> + break;
> case 'a': // Simple upper registers
> case 'b': // Base pointer registers pairs
> case 'd': // Upper register
> @@ -1715,9 +1717,7 @@ AVRTargetLowering::getConstraintType(Str
> case 'O': // Integer constant (Range: 8, 16, 24)
> case 'P': // Integer constant (Range: 1)
> case 'R': // Integer constant (Range: -6 to 5)x
> - return C_Other;
> - default:
> - break;
> + return C_Immediate;
> }
> }
>
>
> Modified: llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp Fri Aug 2 22:52:47 2019
> @@ -2407,6 +2407,10 @@ RISCVTargetLowering::getConstraintType(S
> break;
> case 'f':
> return C_RegisterClass;
> + case 'I':
> + case 'J':
> + case 'K':
> + return C_Immediate;
> }
> }
> return TargetLowering::getConstraintType(Constraint);
>
> Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Fri Aug 2 22:52:47 2019
> @@ -3183,7 +3183,7 @@ SparcTargetLowering::getConstraintType(S
> case 'e':
> return C_RegisterClass;
> case 'I': // SIMM13
> - return C_Other;
> + return C_Immediate;
> }
> }
>
>
> Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Fri Aug 2 22:52:47 2019
> @@ -956,7 +956,7 @@ SystemZTargetLowering::getConstraintType
> case 'K': // Signed 16-bit constant
> case 'L': // Signed 20-bit displacement (on all targets we support)
> case 'M': // 0x7fffffff
> - return C_Other;
> + return C_Immediate;
>
> default:
> break;
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Aug 2 22:52:47 2019
> @@ -44875,10 +44875,11 @@ X86TargetLowering::getConstraintType(Str
> case 'I':
> case 'J':
> case 'K':
> - case 'L':
> - case 'M':
> case 'N':
> case 'G':
> + case 'L':
> + case 'M':
> + return C_Immediate;
> case 'C':
> case 'e':
> case 'Z':
>
> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-I.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-I.ll?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-I.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-I.ll Fri Aug 2 22:52:47 2019
> @@ -2,7 +2,7 @@
> ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
>
> ; Check for at least one invalid constant.
> -; CHECK-ERRORS: error: invalid operand for inline asm constraint 'I'
> +; CHECK-ERRORS: error: value out of range for constraint 'I'
>
> define i32 @constraint_I(i32 %i, i32 %j) nounwind ssp {
> entry:
>
> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-J.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-J.ll?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-J.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-J.ll Fri Aug 2 22:52:47 2019
> @@ -2,7 +2,7 @@
> ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
>
> ; Check for at least one invalid constant.
> -; CHECK-ERRORS: error: invalid operand for inline asm constraint 'J'
> +; CHECK-ERRORS: error: value out of range for constraint 'J'
>
> define i32 @constraint_J(i32 %i, i32 %j) nounwind ssp {
> entry:
>
> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-K.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-K.ll?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-K.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-K.ll Fri Aug 2 22:52:47 2019
> @@ -2,7 +2,7 @@
> ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
>
> ; Check for at least one invalid constant.
> -; CHECK-ERRORS: error: invalid operand for inline asm constraint 'K'
> +; CHECK-ERRORS: error: value out of range for constraint 'K'
>
> define i32 @constraint_K(i32 %i, i32 %j) nounwind {
> entry:
>
> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-L.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-L.ll?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-L.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-L.ll Fri Aug 2 22:52:47 2019
> @@ -2,7 +2,7 @@
> ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
>
> ; Check for at least one invalid constant.
> -; CHECK-ERRORS: error: invalid operand for inline asm constraint 'L'
> +; CHECK-ERRORS: error: value out of range for constraint 'L'
>
> define i32 @constraint_L(i32 %i, i32 %j) nounwind {
> entry:
>
> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-M.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-M.ll?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-M.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-M.ll Fri Aug 2 22:52:47 2019
> @@ -2,7 +2,7 @@
> ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
>
> ; Check for at least one invalid constant.
> -; CHECK-ERRORS: error: invalid operand for inline asm constraint 'M'
> +; CHECK-ERRORS: error: value out of range for constraint 'M'
>
> define i32 @constraint_M(i32 %i, i32 %j) nounwind {
> entry:
>
> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-N.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-N.ll?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-N.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-N.ll Fri Aug 2 22:52:47 2019
> @@ -2,7 +2,7 @@
> ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
>
> ; Check for at least one invalid constant.
> -; CHECK-ERRORS: error: invalid operand for inline asm constraint 'N'
> +; CHECK-ERRORS: error: value out of range for constraint 'N'
>
> define i32 @constraint_N(i32 %i, i32 %j) nounwind {
> entry:
>
> Modified: llvm/trunk/test/CodeGen/RISCV/inline-asm-invalid.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/RISCV/inline-asm-invalid.ll?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/RISCV/inline-asm-invalid.ll (original)
> +++ llvm/trunk/test/CodeGen/RISCV/inline-asm-invalid.ll Fri Aug 2 22:52:47 2019
> @@ -2,23 +2,23 @@
> ; RUN: not llc -mtriple=riscv64 < %s 2>&1 | FileCheck %s
>
> define void @constraint_I() {
> -; CHECK: error: invalid operand for inline asm constraint 'I'
> +; CHECK: error: value out of range for constraint 'I'
> tail call void asm sideeffect "addi a0, a0, $0", "I"(i32 2048)
> -; CHECK: error: invalid operand for inline asm constraint 'I'
> +; CHECK: error: value out of range for constraint 'I'
> tail call void asm sideeffect "addi a0, a0, $0", "I"(i32 -2049)
> ret void
> }
>
> define void @constraint_J() {
> -; CHECK: error: invalid operand for inline asm constraint 'J'
> +; CHECK: error: value out of range for constraint 'J'
> tail call void asm sideeffect "addi a0, a0, $0", "J"(i32 1)
> ret void
> }
>
> define void @constraint_K() {
> -; CHECK: error: invalid operand for inline asm constraint 'K'
> +; CHECK: error: value out of range for constraint 'K'
> tail call void asm sideeffect "csrwi mstatus, $0", "K"(i32 32)
> -; CHECK: error: invalid operand for inline asm constraint 'K'
> +; CHECK: error: value out of range for constraint 'K'
> tail call void asm sideeffect "csrwi mstatus, $0", "K"(i32 -1)
> ret void
> }
>
> Modified: llvm/trunk/test/CodeGen/X86/inline-asm-bad-constraint-n.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-bad-constraint-n.ll?rev=367750&r1=367749&r2=367750&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/inline-asm-bad-constraint-n.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/inline-asm-bad-constraint-n.ll Fri Aug 2 22:52:47 2019
> @@ -2,7 +2,7 @@
>
> @x = global i32 0, align 4
>
> -;CHECK: error: invalid operand for inline asm constraint 'n'
> +; CHECK: error: constraint 'n' expects an integer constant expression
> define void @foo() {
> %a = getelementptr i32, i32* @x, i32 1
> call void asm sideeffect "foo $0", "n"(i32* %a) nounwind
>
> Added: llvm/trunk/test/CodeGen/X86/inline-asm-e-constraint.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-e-constraint.ll?rev=367750&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/inline-asm-e-constraint.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/inline-asm-e-constraint.ll Fri Aug 2 22:52:47 2019
> @@ -0,0 +1,17 @@
> +; RUN: not llc -mtriple=x86_64-unknown-unknown -no-integrated-as < %s 2>&1 | FileCheck %s
> +
> +%struct.s = type { i32, i32 }
> +
> + at pr40890.s = internal global %struct.s zeroinitializer, align 4
> +
> +; CHECK: error: invalid operand for inline asm constraint 'e'
> +; CHECK: error: invalid operand for inline asm constraint 'e'
> +
> +define void @pr40890() {
> +entry:
> + ; This pointer cannot be used as an integer constant expression.
> + tail call void asm sideeffect "\0A#define GLOBAL_A abcd$0\0A", "e,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds (%struct.s, %struct.s* @pr40890.s, i64 0, i32 0))
> + ; Floating-point is also not okay.
> + tail call void asm sideeffect "\0A#define PI abcd$0\0A", "e,~{dirflag},~{fpsr},~{flags}"(float 0x40091EB860000000)
> + ret void
> +}
>
> Added: llvm/trunk/test/CodeGen/X86/inline-asm-imm-out-of-range.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-imm-out-of-range.ll?rev=367750&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/inline-asm-imm-out-of-range.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/inline-asm-imm-out-of-range.ll Fri Aug 2 22:52:47 2019
> @@ -0,0 +1,7 @@
> +; RUN: not llc -mtriple=i686-- -no-integrated-as < %s 2>&1 | FileCheck %s
> +
> +; CHECK: error: value out of range for constraint 'I'
> +define void @foo() {
> + call void asm sideeffect "foo $0", "I"(i32 42)
> + ret void
> +}
>
> Added: llvm/trunk/test/CodeGen/X86/inline-asm-n-constraint.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-n-constraint.ll?rev=367750&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/inline-asm-n-constraint.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/inline-asm-n-constraint.ll Fri Aug 2 22:52:47 2019
> @@ -0,0 +1,13 @@
> +; RUN: llc -mtriple=x86_64-unknown-unknown -no-integrated-as < %s 2>&1 | FileCheck %s
> +
> + at x = global i32 0, align 4
> +
> +define void @foo() {
> +; CHECK-LABEL: foo:
> + call void asm sideeffect "foo $0", "n"(i32 42) nounwind
> +; CHECK: #APP
> +; CHECK-NEXT: foo $42
> +; CHECK-NEXT: #NO_APP
> + ret void
> +; CHECK-NEXT: retq
> +}
>
>
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