[llvm] r368386 - [X86] Simplify ReplaceNodeResults handling for SIGN_EXTEND/ZERO_EXTEND/TRUNCATE for vectors to only handle widening.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 8 20:08:54 PDT 2019
Author: ctopper
Date: Thu Aug 8 20:08:54 2019
New Revision: 368386
URL: http://llvm.org/viewvc/llvm-project?rev=368386&view=rev
Log:
[X86] Simplify ReplaceNodeResults handling for SIGN_EXTEND/ZERO_EXTEND/TRUNCATE for vectors to only handle widening.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=368386&r1=368385&r2=368386&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Aug 8 20:08:54 2019
@@ -27633,8 +27633,8 @@ void X86TargetLowering::ReplaceNodeResul
}
case ISD::TRUNCATE: {
MVT VT = N->getSimpleValueType(0);
- if (getTypeAction(*DAG.getContext(), VT) != TypeWidenVector)
- return;
+ assert(getTypeAction(*DAG.getContext(), VT) == TypeWidenVector &&
+ "Unexpected type action!");
// The generic legalizer will try to widen the input type to the same
// number of elements as the widened result type. But this isn't always
@@ -27688,8 +27688,9 @@ void X86TargetLowering::ReplaceNodeResul
SDValue In = N->getOperand(0);
EVT InVT = In.getValueType();
if (!Subtarget.hasSSE41() && VT == MVT::v4i64 &&
- (InVT == MVT::v4i16 || InVT == MVT::v4i8) &&
- getTypeAction(*DAG.getContext(), InVT) == TypeWidenVector) {
+ (InVT == MVT::v4i16 || InVT == MVT::v4i8)){
+ assert(getTypeAction(*DAG.getContext(), InVT) == TypeWidenVector &&
+ "Unexpected type action!");
assert(N->getOpcode() == ISD::SIGN_EXTEND && "Unexpected opcode");
// Custom split this so we can extend i8/i16->i32 invec. This is better
// since sign_extend_inreg i8/i16->i64 requires an extend to i32 using
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