[PATCH] D65857: [MC][AArch64] Restrict use of signed relocation operators on MOV[NZK]

[Peter Smith via Phabricator via llvm-commits]

peter.smith added a comment.

I will also need to fix up the LLD test/ELF/aarch64-reloc.s as this is the only place where the signed relocations are used with _nc on mov[nz] and the checked on movk. A simple change that works is:

   .section .R_AARCH64_MOVW_PREL,"ax", at progbits
      movz x1, #:prel_g0:.+1
  -   movz x1, #:prel_g0_nc:.-1
  -   movk x1, #:prel_g0:.+1
  +   movn x1, #:prel_g0:.-1
  +   movk x1, #:prel_g0_nc:.+1
      movk x1, #:prel_g0_nc:.-1
      movz x2, #:prel_g1:.+0x20000
  -   movz x2, #:prel_g1_nc:.-0x20000
  -   movk x2, #:prel_g1:.+0x20000
  +   movn x2, #:prel_g1:.-0x20000
  +   movk x2, #:prel_g1_nc:.+0x20000
      movk x2, #:prel_g1_nc:.-0x20000
      movz x3, #:prel_g2:.+0x300000000
  -   movz x3, #:prel_g2_nc:.-0x300000000
  -   movk x3, #:prel_g2:.+0x300000000
  +   movn x3, #:prel_g2:.-0x300000000
  +   movk x3, #:prel_g2_nc:.+0x300000000
      movk x3, #:prel_g2_nc:.-0x300000000
      movz x3, #:prel_g2:.+0x300000000
      movz x4, #:prel_g3:.+0x4000000000000
      movz x4, #:prel_g3:.-0x4000000000000
  -   movk x4, #:prel_g3:.+0x4000000000000
  -   movk x4, #:prel_g3:.-0x4000000000000
   
   # CHECK: Disassembly of section .R_AARCH64_MOVW_PREL:
   # CHECK-EMPTY:
  @@ -253,5 +251,3 @@ movz1:
   ## 1125899906842624 = 0x4000000000000
   # CHECK-NEXT: 2100d0: 84 00 e0 d2  mov x4, #1125899906842624
   # CHECK-NEXT: 2100d4: 84 ff ff d2  mov x4, #-1125899906842624
  -# CHECK-NEXT: 2100d8: 84 00 e0 f2  movk        x4, #4, lsl #48
  -# CHECK-NEXT: 2100dc: 84 ff ff f2  movk        x4, #65532, lsl #48

This doesn't test the LLD specific parts that can handle those cases, I can write a YAML test for that separately.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65857/new/

https://reviews.llvm.org/D65857