[llvm] r368123 - [X86] Limit vpermil2pd/vpermil2ps immediates to 4 bits in the assembly parser.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 6 22:34:27 PDT 2019
Author: ctopper
Date: Tue Aug 6 22:34:27 2019
New Revision: 368123
URL: http://llvm.org/viewvc/llvm-project?rev=368123&view=rev
Log:
[X86] Limit vpermil2pd/vpermil2ps immediates to 4 bits in the assembly parser.
The upper 4 bits of the immediate byte are used to encode a
register. We need to limit the explicit immediate to fit in the
remaining 4 bits.
Fixes PR42899.
Modified:
llvm/trunk/lib/Target/X86/AsmParser/X86AsmParserCommon.h
llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86InstrXOP.td
llvm/trunk/test/MC/X86/x86_errors.s
llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-2.s
llvm/trunk/test/tools/llvm-mca/X86/Generic/xop-super-registers-2.s
llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp
Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParserCommon.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParserCommon.h?rev=368123&r1=368122&r2=368123&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParserCommon.h (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParserCommon.h Tue Aug 6 22:34:27 2019
@@ -35,6 +35,10 @@ inline bool isImmUnsignedi8Value(uint64_
return isUInt<8>(Value) || isInt<8>(Value);
}
+inline bool isImmUnsignedi4Value(uint64_t Value) {
+ return isUInt<4>(Value);
+}
+
} // End of namespace llvm
#endif
Modified: llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h?rev=368123&r1=368122&r2=368123&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h Tue Aug 6 22:34:27 2019
@@ -260,6 +260,15 @@ struct X86Operand final : public MCParse
return isImmSExti64i32Value(CE->getValue());
}
+ bool isImmUnsignedi4() const {
+ if (!isImm()) return false;
+ // If this isn't a constant expr, just assume it fits and let relaxation
+ // handle it.
+ const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
+ if (!CE) return true;
+ return isImmUnsignedi4Value(CE->getValue());
+ }
+
bool isImmUnsignedi8() const {
if (!isImm()) return false;
// If this isn't a constant expr, just assume it fits and let relaxation
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=368123&r1=368122&r2=368123&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Aug 6 22:34:27 2019
@@ -673,6 +673,13 @@ def ImmSExti64i8AsmOperand : ImmSExtAsmO
ImmSExti64i32AsmOperand];
}
+// 4-bit immediate used by some XOP instructions
+// [0, 0xF]
+def ImmUnsignedi4AsmOperand : AsmOperandClass {
+ let Name = "ImmUnsignedi4";
+ let RenderMethod = "addImmOperands";
+}
+
// Unsigned immediate used by SSE/AVX instructions
// [0, 0xFF]
// [0xFFFFFFFFFFFFFF80, 0xFFFFFFFFFFFFFFFF]
@@ -705,6 +712,13 @@ def i64i8imm : Operand<i64> {
let OperandType = "OPERAND_IMMEDIATE";
}
+// Unsigned 4-bit immediate used by some XOP instructions.
+def u4imm : Operand<i8> {
+ let PrintMethod = "printU8Imm";
+ let ParserMatchClass = ImmUnsignedi4AsmOperand;
+ let OperandType = "OPERAND_IMMEDIATE";
+}
+
// Unsigned 8-bit immediate used by SSE/AVX instructions.
def u8imm : Operand<i8> {
let PrintMethod = "printU8Imm";
Modified: llvm/trunk/lib/Target/X86/X86InstrXOP.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrXOP.td?rev=368123&r1=368122&r2=368123&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrXOP.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrXOP.td Tue Aug 6 22:34:27 2019
@@ -418,14 +418,14 @@ multiclass xop_vpermil2<bits<8> Opc, str
ValueType VT, PatFrag FPLdFrag, PatFrag IntLdFrag,
X86FoldableSchedWrite sched> {
def rr : IXOP5<Opc, MRMSrcReg, (outs RC:$dst),
- (ins RC:$src1, RC:$src2, RC:$src3, u8imm:$src4),
+ (ins RC:$src1, RC:$src2, RC:$src3, u4imm:$src4),
!strconcat(OpcodeStr,
"\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
[(set RC:$dst,
(VT (X86vpermil2 RC:$src1, RC:$src2, RC:$src3, (i8 imm:$src4))))]>,
Sched<[sched]>;
def rm : IXOP5<Opc, MRMSrcMemOp4, (outs RC:$dst),
- (ins RC:$src1, RC:$src2, intmemop:$src3, u8imm:$src4),
+ (ins RC:$src1, RC:$src2, intmemop:$src3, u4imm:$src4),
!strconcat(OpcodeStr,
"\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
[(set RC:$dst,
@@ -433,7 +433,7 @@ multiclass xop_vpermil2<bits<8> Opc, str
(i8 imm:$src4))))]>, VEX_W,
Sched<[sched.Folded, sched.ReadAfterFold, sched.ReadAfterFold]>;
def mr : IXOP5<Opc, MRMSrcMem, (outs RC:$dst),
- (ins RC:$src1, fpmemop:$src2, RC:$src3, u8imm:$src4),
+ (ins RC:$src1, fpmemop:$src2, RC:$src3, u4imm:$src4),
!strconcat(OpcodeStr,
"\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
[(set RC:$dst,
@@ -447,7 +447,7 @@ multiclass xop_vpermil2<bits<8> Opc, str
// For disassembler
let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in
def rr_REV : IXOP5<Opc, MRMSrcRegOp4, (outs RC:$dst),
- (ins RC:$src1, RC:$src2, RC:$src3, u8imm:$src4),
+ (ins RC:$src1, RC:$src2, RC:$src3, u4imm:$src4),
!strconcat(OpcodeStr,
"\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
[]>, VEX_W, Sched<[sched]>, FoldGenData<NAME#rr>;
Modified: llvm/trunk/test/MC/X86/x86_errors.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86_errors.s?rev=368123&r1=368122&r2=368123&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86_errors.s (original)
+++ llvm/trunk/test/MC/X86/x86_errors.s Tue Aug 6 22:34:27 2019
@@ -179,3 +179,7 @@ cmpxchg16b (%eax)
// 32: error: unsupported instruction
// 64: error: unsupported instruction
{evex} vmovdqu %xmm0, %xmm0
+
+// 32: 12: error: invalid operand for instruction
+// 64: 12: error: invalid operand for instruction
+vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
Modified: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-2.s?rev=368123&r1=368122&r2=368123&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-2.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-2.s Tue Aug 6 22:34:27 2019
@@ -2,7 +2,7 @@
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=2 < %s | FileCheck %s
vmulps %ymm0, %ymm1, %ymm2
- vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+ vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
vmulps %ymm2, %ymm3, %ymm4
vaddps %ymm4, %ymm5, %ymm6
vmulps %ymm6, %ymm3, %ymm4
@@ -28,7 +28,7 @@
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 2 5 1.00 vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: 1 3 1.00 vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+# CHECK-NEXT: 1 3 1.00 vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
# CHECK-NEXT: 2 5 1.00 vmulps %ymm2, %ymm3, %ymm4
# CHECK-NEXT: 2 5 1.00 vaddps %ymm4, %ymm5, %ymm6
# CHECK-NEXT: 2 5 1.00 vmulps %ymm6, %ymm3, %ymm4
@@ -66,7 +66,7 @@
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions:
# CHECK-NEXT: - - - - - - - - 1.58 0.42 - - - - - 1.00 - - - - - - - vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: - - - - - - - - 0.44 1.56 - - - - 0.61 0.39 - - - - - - - vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+# CHECK-NEXT: - - - - - - - - 0.44 1.56 - - - - 0.61 0.39 - - - - - - - vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
# CHECK-NEXT: - - - - - - - - 1.58 0.42 - - - - - 1.00 - - - - - - - vmulps %ymm2, %ymm3, %ymm4
# CHECK-NEXT: - - - - - - - - 0.40 1.60 - - - - 1.00 - - - - - - - - vaddps %ymm4, %ymm5, %ymm6
# CHECK-NEXT: - - - - - - - - 1.58 0.42 - - - - - 1.00 - - - - - - - vmulps %ymm6, %ymm3, %ymm4
@@ -77,13 +77,13 @@
# CHECK-NEXT: Index 0123456789 0123456789
# CHECK: [0,0] DeeeeeER . . . . .. vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: [0,1] DeeeE--R . . . . .. vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+# CHECK-NEXT: [0,1] DeeeE--R . . . . .. vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
# CHECK-NEXT: [0,2] .D==eeeeeER . . . .. vmulps %ymm2, %ymm3, %ymm4
# CHECK-NEXT: [0,3] .D=======eeeeeER . . .. vaddps %ymm4, %ymm5, %ymm6
# CHECK-NEXT: [0,4] . D===========eeeeeER . .. vmulps %ymm6, %ymm3, %ymm4
# CHECK-NEXT: [0,5] . D================eeeeeER .. vaddps %ymm4, %ymm5, %ymm0
# CHECK-NEXT: [1,0] . D====================eeeeeER. vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: [1,1] . DeeeE----------------------R. vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+# CHECK-NEXT: [1,1] . DeeeE----------------------R. vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
# CHECK-NEXT: [1,2] . D==eeeeeE-----------------R. vmulps %ymm2, %ymm3, %ymm4
# CHECK-NEXT: [1,3] . D=======eeeeeE------------R. vaddps %ymm4, %ymm5, %ymm6
# CHECK-NEXT: [1,4] . D===========eeeeeE--------R vmulps %ymm6, %ymm3, %ymm4
@@ -97,7 +97,7 @@
# CHECK: [0] [1] [2] [3]
# CHECK-NEXT: 0. 2 11.0 0.5 0.0 vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: 1. 2 1.0 1.0 12.0 vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+# CHECK-NEXT: 1. 2 1.0 1.0 12.0 vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
# CHECK-NEXT: 2. 2 3.0 0.0 8.5 vmulps %ymm2, %ymm3, %ymm4
# CHECK-NEXT: 3. 2 8.0 0.0 6.0 vaddps %ymm4, %ymm5, %ymm6
# CHECK-NEXT: 4. 2 12.0 0.0 4.0 vmulps %ymm6, %ymm3, %ymm4
Modified: llvm/trunk/test/tools/llvm-mca/X86/Generic/xop-super-registers-2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/Generic/xop-super-registers-2.s?rev=368123&r1=368122&r2=368123&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/Generic/xop-super-registers-2.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/Generic/xop-super-registers-2.s Tue Aug 6 22:34:27 2019
@@ -2,7 +2,7 @@
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=2 < %s | FileCheck %s
vmulps %ymm0, %ymm1, %ymm2
- vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+ vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
vmulps %ymm2, %ymm3, %ymm4
vaddps %ymm4, %ymm5, %ymm6
vmulps %ymm6, %ymm3, %ymm4
@@ -28,7 +28,7 @@
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 5 1.00 vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: 1 1 1.00 vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+# CHECK-NEXT: 1 1 1.00 vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
# CHECK-NEXT: 1 5 1.00 vmulps %ymm2, %ymm3, %ymm4
# CHECK-NEXT: 1 3 1.00 vaddps %ymm4, %ymm5, %ymm6
# CHECK-NEXT: 1 5 1.00 vmulps %ymm6, %ymm3, %ymm4
@@ -51,7 +51,7 @@
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
# CHECK-NEXT: - - 1.00 - - - - - vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: - - - - - 1.00 - - vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+# CHECK-NEXT: - - - - - 1.00 - - vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
# CHECK-NEXT: - - 1.00 - - - - - vmulps %ymm2, %ymm3, %ymm4
# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm4, %ymm5, %ymm6
# CHECK-NEXT: - - 1.00 - - - - - vmulps %ymm6, %ymm3, %ymm4
@@ -62,13 +62,13 @@
# CHECK-NEXT: Index 0123456789 01234
# CHECK: [0,0] DeeeeeER . . . . vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: [0,1] DeE----R . . . . vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+# CHECK-NEXT: [0,1] DeE----R . . . . vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
# CHECK-NEXT: [0,2] D=eeeeeER . . . . vmulps %ymm2, %ymm3, %ymm4
# CHECK-NEXT: [0,3] D======eeeER . . . vaddps %ymm4, %ymm5, %ymm6
# CHECK-NEXT: [0,4] .D========eeeeeER . . vmulps %ymm6, %ymm3, %ymm4
# CHECK-NEXT: [0,5] .D=============eeeER. . vaddps %ymm4, %ymm5, %ymm0
# CHECK-NEXT: [1,0] .D================eeeeeER vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: [1,1] .DeE--------------------R vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+# CHECK-NEXT: [1,1] .DeE--------------------R vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
# CHECK-NEXT: [1,2] . DeeeeeE---------------R vmulps %ymm2, %ymm3, %ymm4
# CHECK-NEXT: [1,3] . D=====eeeE------------R vaddps %ymm4, %ymm5, %ymm6
# CHECK-NEXT: [1,4] . D========eeeeeE-------R vmulps %ymm6, %ymm3, %ymm4
@@ -82,7 +82,7 @@
# CHECK: [0] [1] [2] [3]
# CHECK-NEXT: 0. 2 9.0 0.5 0.0 vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: 1. 2 1.0 1.0 12.0 vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2
+# CHECK-NEXT: 1. 2 1.0 1.0 12.0 vpermil2pd $15, %xmm3, %xmm5, %xmm1, %xmm2
# CHECK-NEXT: 2. 2 1.5 0.0 7.5 vmulps %ymm2, %ymm3, %ymm4
# CHECK-NEXT: 3. 2 6.5 0.0 6.0 vaddps %ymm4, %ymm5, %ymm6
# CHECK-NEXT: 4. 2 9.0 0.0 3.5 vmulps %ymm6, %ymm3, %ymm4
Modified: llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp?rev=368123&r1=368122&r2=368123&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp (original)
+++ llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp Tue Aug 6 22:34:27 2019
@@ -854,6 +854,7 @@ OperandType RecognizableInstr::typeFromS
TYPE("GR64", TYPE_R64)
TYPE("i8mem", TYPE_M)
TYPE("i8imm", TYPE_IMM)
+ TYPE("u4imm", TYPE_UIMM8)
TYPE("u8imm", TYPE_UIMM8)
TYPE("i16u8imm", TYPE_UIMM8)
TYPE("i32u8imm", TYPE_UIMM8)
@@ -973,6 +974,7 @@ RecognizableInstr::immediateEncodingFrom
ENCODING("i64i32imm", ENCODING_ID)
ENCODING("i64i8imm", ENCODING_IB)
ENCODING("i8imm", ENCODING_IB)
+ ENCODING("u4imm", ENCODING_IB)
ENCODING("u8imm", ENCODING_IB)
ENCODING("i16u8imm", ENCODING_IB)
ENCODING("i32u8imm", ENCODING_IB)
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