[llvm] r368026 - [X86][SSE] Call SimplifyMultipleUseDemandedBits on PACKSS/PACKUS arguments.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 6 06:10:42 PDT 2019


Author: rksimon
Date: Tue Aug  6 06:10:42 2019
New Revision: 368026

URL: http://llvm.org/viewvc/llvm-project?rev=368026&view=rev
Log:
[X86][SSE] Call SimplifyMultipleUseDemandedBits on PACKSS/PACKUS arguments.

This mainly helps to replace unused arguments with UNDEF in the case where they have multiple users.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/vector-trunc-packus-widen.ll
    llvm/trunk/test/CodeGen/X86/vector-trunc-packus.ll
    llvm/trunk/test/CodeGen/X86/vector-trunc-ssat-widen.ll
    llvm/trunk/test/CodeGen/X86/vector-trunc-ssat.ll
    llvm/trunk/test/CodeGen/X86/vector-trunc-usat-widen.ll
    llvm/trunk/test/CodeGen/X86/vector-trunc-usat.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=368026&r1=368025&r2=368026&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Aug  6 06:10:42 2019
@@ -34129,16 +34129,36 @@ bool X86TargetLowering::SimplifyDemanded
   }
   case X86ISD::PACKSS:
   case X86ISD::PACKUS: {
+    SDValue N0 = Op.getOperand(0);
+    SDValue N1 = Op.getOperand(1);
+
     APInt DemandedLHS, DemandedRHS;
     getPackDemandedElts(VT, DemandedElts, DemandedLHS, DemandedRHS);
 
     APInt SrcUndef, SrcZero;
-    if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedLHS, SrcUndef,
-                                   SrcZero, TLO, Depth + 1))
+    if (SimplifyDemandedVectorElts(N0, DemandedLHS, SrcUndef, SrcZero, TLO,
+                                   Depth + 1))
       return true;
-    if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedRHS, SrcUndef,
-                                   SrcZero, TLO, Depth + 1))
+    if (SimplifyDemandedVectorElts(N1, DemandedRHS, SrcUndef, SrcZero, TLO,
+                                   Depth + 1))
       return true;
+
+    // Aggressively peek through ops to get at the demanded elts.
+    // TODO - we should do this for all target/faux shuffles ops.
+    if (!DemandedElts.isAllOnesValue()) {
+      APInt DemandedSrcBits =
+          APInt::getAllOnesValue(N0.getScalarValueSizeInBits());
+      SDValue NewN0 = SimplifyMultipleUseDemandedBits(
+          N0, DemandedSrcBits, DemandedLHS, TLO.DAG, Depth + 1);
+      SDValue NewN1 = SimplifyMultipleUseDemandedBits(
+          N1, DemandedSrcBits, DemandedRHS, TLO.DAG, Depth + 1);
+      if (NewN0 || NewN1) {
+        NewN0 = NewN0 ? NewN0 : N0;
+        NewN1 = NewN1 ? NewN1 : N1;
+        return TLO.CombineTo(Op,
+                             TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewN0, NewN1));
+      }
+    }
     break;
   }
   case X86ISD::HADD:

Modified: llvm/trunk/test/CodeGen/X86/vector-trunc-packus-widen.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-trunc-packus-widen.ll?rev=368026&r1=368025&r2=368026&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-trunc-packus-widen.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-trunc-packus-widen.ll Tue Aug  6 06:10:42 2019
@@ -1982,7 +1982,7 @@ define void @trunc_packus_v8i64_v8i8_sto
 ; SSE41-NEXT:    blendvpd %xmm0, %xmm8, %xmm1
 ; SSE41-NEXT:    packusdw %xmm3, %xmm1
 ; SSE41-NEXT:    packusdw %xmm1, %xmm4
-; SSE41-NEXT:    packuswb %xmm4, %xmm4
+; SSE41-NEXT:    packuswb %xmm0, %xmm4
 ; SSE41-NEXT:    movq %xmm4, (%rdi)
 ; SSE41-NEXT:    retq
 ;

Modified: llvm/trunk/test/CodeGen/X86/vector-trunc-packus.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-trunc-packus.ll?rev=368026&r1=368025&r2=368026&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-trunc-packus.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-trunc-packus.ll Tue Aug  6 06:10:42 2019
@@ -1982,7 +1982,7 @@ define void @trunc_packus_v8i64_v8i8_sto
 ; SSE41-NEXT:    blendvpd %xmm0, %xmm8, %xmm1
 ; SSE41-NEXT:    packusdw %xmm3, %xmm1
 ; SSE41-NEXT:    packusdw %xmm1, %xmm4
-; SSE41-NEXT:    packuswb %xmm4, %xmm4
+; SSE41-NEXT:    packuswb %xmm0, %xmm4
 ; SSE41-NEXT:    movq %xmm4, (%rdi)
 ; SSE41-NEXT:    retq
 ;

Modified: llvm/trunk/test/CodeGen/X86/vector-trunc-ssat-widen.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-trunc-ssat-widen.ll?rev=368026&r1=368025&r2=368026&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-trunc-ssat-widen.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-trunc-ssat-widen.ll Tue Aug  6 06:10:42 2019
@@ -1927,7 +1927,7 @@ define void @trunc_ssat_v8i64_v8i8_store
 ; SSE41-NEXT:    andpd %xmm0, %xmm2
 ; SSE41-NEXT:    packusdw %xmm7, %xmm2
 ; SSE41-NEXT:    packusdw %xmm3, %xmm2
-; SSE41-NEXT:    packuswb %xmm2, %xmm2
+; SSE41-NEXT:    packuswb %xmm0, %xmm2
 ; SSE41-NEXT:    movq %xmm2, (%rdi)
 ; SSE41-NEXT:    retq
 ;

Modified: llvm/trunk/test/CodeGen/X86/vector-trunc-ssat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-trunc-ssat.ll?rev=368026&r1=368025&r2=368026&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-trunc-ssat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-trunc-ssat.ll Tue Aug  6 06:10:42 2019
@@ -1927,7 +1927,7 @@ define void @trunc_ssat_v8i64_v8i8_store
 ; SSE41-NEXT:    andpd %xmm0, %xmm2
 ; SSE41-NEXT:    packusdw %xmm7, %xmm2
 ; SSE41-NEXT:    packusdw %xmm3, %xmm2
-; SSE41-NEXT:    packuswb %xmm2, %xmm2
+; SSE41-NEXT:    packuswb %xmm0, %xmm2
 ; SSE41-NEXT:    movq %xmm2, (%rdi)
 ; SSE41-NEXT:    retq
 ;

Modified: llvm/trunk/test/CodeGen/X86/vector-trunc-usat-widen.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-trunc-usat-widen.ll?rev=368026&r1=368025&r2=368026&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-trunc-usat-widen.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-trunc-usat-widen.ll Tue Aug  6 06:10:42 2019
@@ -1247,7 +1247,7 @@ define void @trunc_usat_v8i64_v8i8_store
 ; SSE2-NEXT:    por %xmm2, %xmm0
 ; SSE2-NEXT:    packuswb %xmm4, %xmm0
 ; SSE2-NEXT:    packuswb %xmm0, %xmm1
-; SSE2-NEXT:    packuswb %xmm1, %xmm1
+; SSE2-NEXT:    packuswb %xmm0, %xmm1
 ; SSE2-NEXT:    movq %xmm1, (%rdi)
 ; SSE2-NEXT:    retq
 ;
@@ -1310,7 +1310,7 @@ define void @trunc_usat_v8i64_v8i8_store
 ; SSSE3-NEXT:    por %xmm2, %xmm0
 ; SSSE3-NEXT:    packuswb %xmm4, %xmm0
 ; SSSE3-NEXT:    packuswb %xmm0, %xmm1
-; SSSE3-NEXT:    packuswb %xmm1, %xmm1
+; SSSE3-NEXT:    packuswb %xmm0, %xmm1
 ; SSSE3-NEXT:    movq %xmm1, (%rdi)
 ; SSSE3-NEXT:    retq
 ;
@@ -1364,7 +1364,7 @@ define void @trunc_usat_v8i64_v8i8_store
 ; SSE41-NEXT:    blendvpd %xmm0, %xmm2, %xmm9
 ; SSE41-NEXT:    packusdw %xmm5, %xmm9
 ; SSE41-NEXT:    packusdw %xmm9, %xmm1
-; SSE41-NEXT:    packuswb %xmm1, %xmm1
+; SSE41-NEXT:    packuswb %xmm0, %xmm1
 ; SSE41-NEXT:    movq %xmm1, (%rdi)
 ; SSE41-NEXT:    retq
 ;
@@ -1998,7 +1998,7 @@ define void @trunc_usat_v8i32_v8i8_store
 ; SSE2-NEXT:    pandn %xmm2, %xmm5
 ; SSE2-NEXT:    por %xmm0, %xmm5
 ; SSE2-NEXT:    packuswb %xmm6, %xmm5
-; SSE2-NEXT:    packuswb %xmm5, %xmm5
+; SSE2-NEXT:    packuswb %xmm0, %xmm5
 ; SSE2-NEXT:    movq %xmm5, (%rdi)
 ; SSE2-NEXT:    retq
 ;

Modified: llvm/trunk/test/CodeGen/X86/vector-trunc-usat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-trunc-usat.ll?rev=368026&r1=368025&r2=368026&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-trunc-usat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-trunc-usat.ll Tue Aug  6 06:10:42 2019
@@ -1247,7 +1247,7 @@ define void @trunc_usat_v8i64_v8i8_store
 ; SSE2-NEXT:    por %xmm2, %xmm0
 ; SSE2-NEXT:    packuswb %xmm4, %xmm0
 ; SSE2-NEXT:    packuswb %xmm0, %xmm1
-; SSE2-NEXT:    packuswb %xmm1, %xmm1
+; SSE2-NEXT:    packuswb %xmm0, %xmm1
 ; SSE2-NEXT:    movq %xmm1, (%rdi)
 ; SSE2-NEXT:    retq
 ;
@@ -1310,7 +1310,7 @@ define void @trunc_usat_v8i64_v8i8_store
 ; SSSE3-NEXT:    por %xmm2, %xmm0
 ; SSSE3-NEXT:    packuswb %xmm4, %xmm0
 ; SSSE3-NEXT:    packuswb %xmm0, %xmm1
-; SSSE3-NEXT:    packuswb %xmm1, %xmm1
+; SSSE3-NEXT:    packuswb %xmm0, %xmm1
 ; SSSE3-NEXT:    movq %xmm1, (%rdi)
 ; SSSE3-NEXT:    retq
 ;
@@ -1364,7 +1364,7 @@ define void @trunc_usat_v8i64_v8i8_store
 ; SSE41-NEXT:    blendvpd %xmm0, %xmm2, %xmm9
 ; SSE41-NEXT:    packusdw %xmm5, %xmm9
 ; SSE41-NEXT:    packusdw %xmm9, %xmm1
-; SSE41-NEXT:    packuswb %xmm1, %xmm1
+; SSE41-NEXT:    packuswb %xmm0, %xmm1
 ; SSE41-NEXT:    movq %xmm1, (%rdi)
 ; SSE41-NEXT:    retq
 ;
@@ -1998,7 +1998,7 @@ define void @trunc_usat_v8i32_v8i8_store
 ; SSE2-NEXT:    pandn %xmm2, %xmm5
 ; SSE2-NEXT:    por %xmm0, %xmm5
 ; SSE2-NEXT:    packuswb %xmm6, %xmm5
-; SSE2-NEXT:    packuswb %xmm5, %xmm5
+; SSE2-NEXT:    packuswb %xmm0, %xmm5
 ; SSE2-NEXT:    movq %xmm5, (%rdi)
 ; SSE2-NEXT:    retq
 ;




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