[PATCH] D65238: AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.store

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle added a comment.

Mostly seems reasonable to me, but two questions inline.



================
Comment at: lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:745-755
+static unsigned extractGLC(unsigned CachePolicy) {
+  return CachePolicy & 1;
+}
+
+static unsigned extractSLC(unsigned CachePolicy) {
+  return (CachePolicy >> 1) & 1;
+}
----------------
Could we rearrange these to have a signature analogous to `parseCachePolicy`, to sanity-check that no bits in CachePolicy are set unexpectedly?


================
Comment at: lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:1600-1611
+#if 0
+      // We directly select here to avoid pack/unpack and conversion
+      // instructions out of a possible waterfall loop, and to avoid unnecessary
+      // intermediate operations.
+
+      if (IntrID == Intrinsic::amdgcn_raw_buffer_store) {
+        MachineIRBuilder B(MI);
----------------
What's the intention here?


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  https://reviews.llvm.org/D65238/new/

https://reviews.llvm.org/D65238