[PATCH] D65719: AMDGPU: Disambiguate v3f16 format in load/store tables

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: nhaehnle, tpr, vpykhtin, dp.
Herald added subscribers: t-tye, dstuttard, yaxunl, wdng, jvesely, kzhuravl.
arsenm added a parent revision: D65683: MVT: Add v3i16/v3f16 vectors.

Currently the searchable tables report the number of dwords. These
round to the same number for 3 and 4 component d16
instructions. Change this to report the number of elements so this
isn't ambiguous.


https://reviews.llvm.org/D65719

Files:
  lib/Target/AMDGPU/BUFInstructions.td
  lib/Target/AMDGPU/SIInstrInfo.td
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

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