[PATCH] D65683: MVT: Add v3i16/v3f16 vectors
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 4 09:41:55 PDT 2019
arsenm marked an inline comment as done.
arsenm added inline comments.
================
Comment at: test/CodeGen/X86/promote-vec3.ll:9
define <3 x i16> @zext_i8(<3 x i8>) {
; SSE3-LABEL: zext_i8:
; SSE3: # %bb.0:
----------------
craig.topper wrote:
> We seem to be changing how we're returning v3i16 here. Previously we returned it as 3 scalars. Now we're returning it as xmm0.
I think the old behavior is broken. If you think maintaining ABI compatibility with this brokenness is important, getRegisterTypeForCallingConv can be used to workaround it
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D65683/new/
https://reviews.llvm.org/D65683
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