[PATCH] D65683: MVT: Add v3i16/v3f16 vectors

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

I think there's a bug in computeRegisterProperties for TypeWidenVector. For non-power2 vectors we need to go the next largest power of 2 vector. Currently its goes through the loop looking for a legal vector with more elements. For X86 it takes v3i16 all the way to v8i16. It should only take it to v4i16.


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  https://reviews.llvm.org/D65683/new/

https://reviews.llvm.org/D65683