[PATCH] D65607: [DAGCombiner] try to convert opposing shifts to casts

[Sanjay Patel via Phabricator via llvm-commits]

spatel marked an inline comment as done.
spatel added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:7624
+      N0.getOperand(0).getOpcode() == ISD::SHL &&
+      N0.getOperand(0).getOperand(1) == N1 && N0.getOperand(0).hasOneUse()) {
+    if (ConstantSDNode *AddC = isConstOrConstSplat(N0.getOperand(1))) {
----------------
lebedev.ri wrote:
> Don't we also need for `N0` to be one-use?
Good catch. I was assuming that the free truncate wasn't a real instruction (and lazily didn't include extra-use tests), so that case would be ok. But that's not true. If either operand has extra uses, this transform can result in an extra x86 instruction, so it's unlikely to be profitable.


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  https://reviews.llvm.org/D65607/new/

https://reviews.llvm.org/D65607