[PATCH] D65600: Relax load store vectorizer pointer strip checks

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 1 12:56:53 PDT 2019


rampitec marked an inline comment as done.
rampitec added inline comments.


================
Comment at: test/Transforms/LoadStoreVectorizer/AMDGPU/vect-ptr-ptr-size-mismatch.ll:29-30
+  %tmp3 = select i1 false, i32** %b14.ascast.i, i32** undef
+  %tmp4 = load i32*, i32** %tmp1, align 8
+  %tmp5 = load i32*, i32** %tmp3, align 8
+  unreachable
----------------
arsenm wrote:
> It would probably be a more useful test to use an address space that will actually be vectorized (i.e. use global instead of flat)
It is neither flat or global, I have removed all references to AMD here, there is no triple and no calling convention, only data layout string.


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  https://reviews.llvm.org/D65600/new/

https://reviews.llvm.org/D65600





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