[PATCH] D65205: [RISCV] Add Custom Parser for Atomic Memory Operands

[Alex Bradbury via Phabricator via llvm-commits]

asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.

Added a nit around a doc comment, but this is looking good - thanks Sam. I agree that the error messages are nicer in this patch vs D65291 <https://reviews.llvm.org/D65291> for now. However I'm very open to further improvements and refactoring of AsmParser logic in the future in follow-on patches. Only caveat to that is that the asm parser for any backend isn't particularly pretty, and that sometimes a little bit of repetition can be easier to read than an all-singing-all-dancing function that can do anything based on what function args you pass.



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Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1308
+  // Instead, we use this custom parser. This will: allow (and discard) an
+  // offset if it zero; expects (and discards) parentheses; and will only add
+  // the parsed register operand to `Operands`.
----------------
"if it is zero"? expects->expect?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65205/new/

https://reviews.llvm.org/D65205