[llvm] r367517 - AMDGPU/SILoadStoreOptimizer: Make some functions const
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 31 22:39:17 PDT 2019
Author: tstellar
Date: Wed Jul 31 22:39:17 2019
New Revision: 367517
URL: http://llvm.org/viewvc/llvm-project?rev=367517&view=rev
Log:
AMDGPU/SILoadStoreOptimizer: Make some functions const
Reviewers: arsenm, pendingchaos, rampitec
Reviewed By: rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65316
Modified:
llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
Modified: llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp?rev=367517&r1=367516&r2=367517&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp Wed Jul 31 22:39:17 2019
@@ -165,9 +165,9 @@ private:
static unsigned getNewOpcode(const CombineInfo &CI);
static std::pair<unsigned, unsigned> getSubRegIdxs(const CombineInfo &CI);
const TargetRegisterClass *getTargetRegisterClass(const CombineInfo &CI);
- unsigned getOpcodeWidth(const MachineInstr &MI);
- InstClassEnum getInstClass(unsigned Opc);
- unsigned getRegs(unsigned Opc);
+ unsigned getOpcodeWidth(const MachineInstr &MI) const;
+ InstClassEnum getInstClass(unsigned Opc) const;
+ unsigned getRegs(unsigned Opc) const;
bool findMatchingInst(CombineInfo &CI);
@@ -394,7 +394,7 @@ bool SILoadStoreOptimizer::widthsFit(con
}
}
-unsigned SILoadStoreOptimizer::getOpcodeWidth(const MachineInstr &MI) {
+unsigned SILoadStoreOptimizer::getOpcodeWidth(const MachineInstr &MI) const {
const unsigned Opc = MI.getOpcode();
if (TII->isMUBUF(MI)) {
@@ -413,7 +413,7 @@ unsigned SILoadStoreOptimizer::getOpcode
}
}
-InstClassEnum SILoadStoreOptimizer::getInstClass(unsigned Opc) {
+InstClassEnum SILoadStoreOptimizer::getInstClass(unsigned Opc) const {
if (TII->isMUBUF(Opc)) {
const int baseOpcode = AMDGPU::getMUBUFBaseOpcode(Opc);
@@ -464,7 +464,7 @@ InstClassEnum SILoadStoreOptimizer::getI
}
}
-unsigned SILoadStoreOptimizer::getRegs(unsigned Opc) {
+unsigned SILoadStoreOptimizer::getRegs(unsigned Opc) const {
if (TII->isMUBUF(Opc)) {
unsigned result = 0;
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