[PATCH] D65542: [PeepholeOptimizer] Don't assume bitcast def always has input

[Jinsong Ji via Phabricator via llvm-commits]

jsji created this revision.
jsji added reviewers: qcolombet, MatzeB, hfinkel.
Herald added subscribers: llvm-commits, MaskRay, kbarton, hiraditya, nemanjai.
Herald added a project: LLVM.

If we have a MI marked with bitcast bits, but without input operands,
PeepholeOptimizer might crash with assert.

eg:
If we apply the changes in PPCInstrVSX.td as in this patch:

[(set v4i32:$XT, (bitconvert (v16i8 immAllOnesV)))]>;

We will get assert in PeepholeOptimizer.

  llvm-lit llvm-project/llvm/test/CodeGen/PowerPC/build-vector-tests.ll -v
  
  llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h:417: const
  llvm::MachineOperand &llvm::MachineInstr::getOperand(unsigned int)
  const: Assertion `i < getNumOperands() && "getOperand() out of range!"'
  failed.

The fix is to abort if we found out of bound access.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D65542

Files:
  llvm/lib/CodeGen/PeepholeOptimizer.cpp
  llvm/lib/Target/PowerPC/PPCInstrVSX.td


Index: llvm/lib/Target/PowerPC/PPCInstrVSX.td
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -1292,11 +1292,8 @@
       isReMaterializable = 1 in {
     def XXLEQVOnes : XX3Form_SameOp<60, 186, (outs vsrc:$XT), (ins),
                          "xxleqv $XT, $XT, $XT", IIC_VecGeneral,
-                         [(set v4i32:$XT, (v4i32 immAllOnesV))]>;
+                         [(set v4i32:$XT, (bitconvert (v16i8 immAllOnesV)))]>;
   }
-  
-  def : Pat<(v4i32 (bitconvert (v16i8 immAllOnesV))),
-            (XXLEQVOnes)>;
 
   def XXLORC : XX3Form<60, 170,
                        (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Index: llvm/lib/CodeGen/PeepholeOptimizer.cpp
===================================================================
--- llvm/lib/CodeGen/PeepholeOptimizer.cpp
+++ llvm/lib/CodeGen/PeepholeOptimizer.cpp
@@ -1855,6 +1855,11 @@
     SrcIdx = OpIdx;
   }
 
+  // In some rare case, the Def has not input, SrcIdx is out of bound,
+  // getOperand(SrcIdx) will fail below.
+  if (SrcIdx >= Def->getNumOperands())
+    return ValueTrackerResult();
+
   // Stop when any user of the bitcast is a SUBREG_TO_REG, replacing with a COPY
   // will break the assumed guarantees for the upper bits.
   for (const MachineInstr &UseMI : MRI.use_nodbg_instructions(DefOp.getReg())) {


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