[llvm] r367415 - [DivRemPairs][NFC] Autogenerate all checklines
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 31 05:06:16 PDT 2019
Author: lebedevri
Date: Wed Jul 31 05:06:16 2019
New Revision: 367415
URL: http://llvm.org/viewvc/llvm-project?rev=367415&view=rev
Log:
[DivRemPairs][NFC] Autogenerate all checklines
Modified:
llvm/trunk/test/Transforms/DivRemPairs/PowerPC/div-expanded-rem-pair.ll
llvm/trunk/test/Transforms/DivRemPairs/PowerPC/div-rem-pairs.ll
llvm/trunk/test/Transforms/DivRemPairs/X86/div-expanded-rem-pair.ll
llvm/trunk/test/Transforms/DivRemPairs/X86/div-rem-pairs.ll
Modified: llvm/trunk/test/Transforms/DivRemPairs/PowerPC/div-expanded-rem-pair.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DivRemPairs/PowerPC/div-expanded-rem-pair.ll?rev=367415&r1=367414&r2=367415&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DivRemPairs/PowerPC/div-expanded-rem-pair.ll (original)
+++ llvm/trunk/test/Transforms/DivRemPairs/PowerPC/div-expanded-rem-pair.ll Wed Jul 31 05:06:16 2019
@@ -113,11 +113,11 @@ define i32 @srem_of_srem_unexpanded(i32
%t0 = mul nsw i32 %Z, %Y
%t1 = sdiv i32 %X, %t0
%t2 = mul nsw i32 %t0, %t1
- %t3.recomposed = srem i32 %X, %t0
- %t4 = sdiv i32 %t3.recomposed, %Y
+ %t3 = srem i32 %X, %t0
+ %t4 = sdiv i32 %t3, %Y
%t5 = mul nsw i32 %t4, %Y
- %t6.recomposed = srem i32 %t3.recomposed, %Y
- ret i32 %t6.recomposed
+ %t6 = srem i32 %t3, %Y
+ ret i32 %t6
}
define i32 @srem_of_srem_expanded(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @srem_of_srem_expanded(
Modified: llvm/trunk/test/Transforms/DivRemPairs/PowerPC/div-rem-pairs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DivRemPairs/PowerPC/div-rem-pairs.ll?rev=367415&r1=367414&r2=367415&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DivRemPairs/PowerPC/div-rem-pairs.ll (original)
+++ llvm/trunk/test/Transforms/DivRemPairs/PowerPC/div-rem-pairs.ll Wed Jul 31 05:06:16 2019
@@ -1,12 +1,13 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -div-rem-pairs -S -mtriple=powerpc64-unknown-unknown | FileCheck %s
declare void @foo(i32, i32)
define void @decompose_illegal_srem_same_block(i32 %a, i32 %b) {
; CHECK-LABEL: @decompose_illegal_srem_same_block(
-; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, %b
-; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[DIV]], %b
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 %a, [[TMP1]]
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[DIV]], [[B]]
+; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[A]], [[TMP1]]
; CHECK-NEXT: call void @foo(i32 [[TMP2]], i32 [[DIV]])
; CHECK-NEXT: ret void
;
@@ -18,9 +19,9 @@ define void @decompose_illegal_srem_same
define void @decompose_illegal_urem_same_block(i32 %a, i32 %b) {
; CHECK-LABEL: @decompose_illegal_urem_same_block(
-; CHECK-NEXT: [[DIV:%.*]] = udiv i32 %a, %b
-; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[DIV]], %b
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 %a, [[TMP1]]
+; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[DIV]], [[B]]
+; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[A]], [[TMP1]]
; CHECK-NEXT: call void @foo(i32 [[TMP2]], i32 [[DIV]])
; CHECK-NEXT: ret void
;
@@ -36,15 +37,15 @@ define void @decompose_illegal_urem_same
define i32 @hoist_sdiv(i32 %a, i32 %b) {
; CHECK-LABEL: @hoist_sdiv(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, %b
-; CHECK-NEXT: [[TMP0:%.*]] = mul i32 [[DIV]], %b
-; CHECK-NEXT: [[TMP1:%.*]] = sub i32 %a, [[TMP0]]
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[TMP0:%.*]] = mul i32 [[DIV]], [[B]]
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[A]], [[TMP0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
@@ -66,15 +67,15 @@ end:
define i64 @hoist_udiv(i64 %a, i64 %b) {
; CHECK-LABEL: @hoist_udiv(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[DIV:%.*]] = udiv i64 %a, %b
-; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[DIV]], %b
-; CHECK-NEXT: [[TMP1:%.*]] = sub i64 %a, [[TMP0]]
+; CHECK-NEXT: [[DIV:%.*]] = udiv i64 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[DIV]], [[B]]
+; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[A]], [[TMP0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[TMP1]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i64 [ [[DIV]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i64 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i64 [[RET]]
;
entry:
@@ -96,15 +97,15 @@ end:
define i16 @hoist_srem(i16 %a, i16 %b) {
; CHECK-LABEL: @hoist_srem(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[DIV:%.*]] = sdiv i16 %a, %b
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i16 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[DIV]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[TMP0:%.*]] = mul i16 [[DIV]], %b
-; CHECK-NEXT: [[TMP1:%.*]] = sub i16 %a, [[TMP0]]
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[TMP0:%.*]] = mul i16 [[DIV]], [[B]]
+; CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[A]], [[TMP0]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i16 [ [[TMP1]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i16 [ [[TMP1]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i16 [[RET]]
;
entry:
@@ -126,15 +127,15 @@ end:
define i8 @hoist_urem(i8 %a, i8 %b) {
; CHECK-LABEL: @hoist_urem(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[DIV:%.*]] = udiv i8 %a, %b
+; CHECK-NEXT: [[DIV:%.*]] = udiv i8 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[DIV]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[TMP0:%.*]] = mul i8 [[DIV]], %b
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 %a, [[TMP0]]
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[TMP0:%.*]] = mul i8 [[DIV]], [[B]]
+; CHECK-NEXT: [[TMP1:%.*]] = sub i8 [[A]], [[TMP0]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i8 [ [[TMP1]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i8 [ [[TMP1]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i8 [[RET]]
;
entry:
@@ -169,11 +170,11 @@ define i32 @srem_of_srem_unexpanded(i32
%t0 = mul nsw i32 %Z, %Y
%t1 = sdiv i32 %X, %t0
%t2 = mul nsw i32 %t0, %t1
- %t3.recomposed = srem i32 %X, %t0
- %t4 = sdiv i32 %t3.recomposed, %Y
+ %t3 = srem i32 %X, %t0
+ %t4 = sdiv i32 %t3, %Y
%t5 = mul nsw i32 %t4, %Y
- %t6.recomposed = srem i32 %t3.recomposed, %Y
- ret i32 %t6.recomposed
+ %t6 = srem i32 %t3, %Y
+ ret i32 %t6
}
define i32 @srem_of_srem_expanded(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @srem_of_srem_expanded(
@@ -201,14 +202,14 @@ define i32 @srem_of_srem_expanded(i32 %X
define i32 @dont_hoist_udiv(i32 %a, i32 %b) {
; CHECK-LABEL: @dont_hoist_udiv(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
+; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[DIV:%.*]] = udiv i32 %a, %b
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
@@ -230,14 +231,14 @@ end:
define i32 @dont_hoist_srem(i32 %a, i32 %b) {
; CHECK-LABEL: @dont_hoist_srem(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[REM:%.*]] = urem i32 %a, %b
+; CHECK-NEXT: [[REM:%.*]] = urem i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[REM2:%.*]] = srem i32 %a, %b
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[REM2:%.*]] = srem i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[REM2]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[REM2]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
@@ -259,14 +260,14 @@ end:
define i32 @dont_hoist_sdiv(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @dont_hoist_sdiv(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
+; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, %c
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A]], [[C:%.*]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
@@ -288,15 +289,15 @@ end:
define i128 @dont_hoist_urem(i128 %a, i128 %b) {
; CHECK-LABEL: @dont_hoist_urem(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[DIV:%.*]] = udiv i128 %a, %b
+; CHECK-NEXT: [[DIV:%.*]] = udiv i128 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i128 [[DIV]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[TMP0:%.*]] = mul i128 [[DIV]], %b
-; CHECK-NEXT: [[TMP1:%.*]] = sub i128 %a, [[TMP0]]
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[TMP0:%.*]] = mul i128 [[DIV]], [[B]]
+; CHECK-NEXT: [[TMP1:%.*]] = sub i128 [[A]], [[TMP0]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i128 [ [[TMP1]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i128 [ [[TMP1]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i128 [[RET]]
;
entry:
@@ -319,15 +320,15 @@ end:
define i32 @no_domination(i1 %cmp, i32 %a, i32 %b) {
; CHECK-LABEL: @no_domination(
; CHECK-NEXT: entry:
-; CHECK-NEXT: br i1 %cmp, label %if, label %else
+; CHECK-NEXT: br i1 [[CMP:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, %b
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: br label [[END:%.*]]
; CHECK: else:
-; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], %if ], [ [[REM]], %else ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ [[REM]], [[ELSE]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
Modified: llvm/trunk/test/Transforms/DivRemPairs/X86/div-expanded-rem-pair.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DivRemPairs/X86/div-expanded-rem-pair.ll?rev=367415&r1=367414&r2=367415&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DivRemPairs/X86/div-expanded-rem-pair.ll (original)
+++ llvm/trunk/test/Transforms/DivRemPairs/X86/div-expanded-rem-pair.ll Wed Jul 31 05:06:16 2019
@@ -102,20 +102,20 @@ define i32 @srem_of_srem_unexpanded(i32
; CHECK-NEXT: [[T0:%.*]] = mul nsw i32 [[Z:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[T1:%.*]] = sdiv i32 [[X:%.*]], [[T0]]
; CHECK-NEXT: [[T2:%.*]] = mul nsw i32 [[T0]], [[T1]]
-; CHECK-NEXT: [[T3_RECOMPOSED:%.*]] = srem i32 [[X]], [[T0]]
-; CHECK-NEXT: [[T4:%.*]] = sdiv i32 [[T3_RECOMPOSED]], [[Y]]
+; CHECK-NEXT: [[T3:%.*]] = srem i32 [[X]], [[T0]]
+; CHECK-NEXT: [[T4:%.*]] = sdiv i32 [[T3]], [[Y]]
; CHECK-NEXT: [[T5:%.*]] = mul nsw i32 [[T4]], [[Y]]
-; CHECK-NEXT: [[T6_RECOMPOSED:%.*]] = srem i32 [[T3_RECOMPOSED]], [[Y]]
-; CHECK-NEXT: ret i32 [[T6_RECOMPOSED]]
+; CHECK-NEXT: [[T6:%.*]] = srem i32 [[T3]], [[Y]]
+; CHECK-NEXT: ret i32 [[T6]]
;
%t0 = mul nsw i32 %Z, %Y
%t1 = sdiv i32 %X, %t0
%t2 = mul nsw i32 %t0, %t1
- %t3.recomposed = srem i32 %X, %t0
- %t4 = sdiv i32 %t3.recomposed, %Y
+ %t3 = srem i32 %X, %t0
+ %t4 = sdiv i32 %t3, %Y
%t5 = mul nsw i32 %t4, %Y
- %t6.recomposed = srem i32 %t3.recomposed, %Y
- ret i32 %t6.recomposed
+ %t6 = srem i32 %t3, %Y
+ ret i32 %t6
}
define i32 @srem_of_srem_expanded(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @srem_of_srem_expanded(
Modified: llvm/trunk/test/Transforms/DivRemPairs/X86/div-rem-pairs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DivRemPairs/X86/div-rem-pairs.ll?rev=367415&r1=367414&r2=367415&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DivRemPairs/X86/div-rem-pairs.ll (original)
+++ llvm/trunk/test/Transforms/DivRemPairs/X86/div-rem-pairs.ll Wed Jul 31 05:06:16 2019
@@ -1,11 +1,12 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -div-rem-pairs -S -mtriple=x86_64-unknown-unknown | FileCheck %s
declare void @foo(i32, i32)
define void @decompose_illegal_srem_same_block(i32 %a, i32 %b) {
; CHECK-LABEL: @decompose_illegal_srem_same_block(
-; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
-; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, %b
+; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A]], [[B]]
; CHECK-NEXT: call void @foo(i32 [[REM]], i32 [[DIV]])
; CHECK-NEXT: ret void
;
@@ -17,8 +18,8 @@ define void @decompose_illegal_srem_same
define void @decompose_illegal_urem_same_block(i32 %a, i32 %b) {
; CHECK-LABEL: @decompose_illegal_urem_same_block(
-; CHECK-NEXT: [[DIV:%.*]] = udiv i32 %a, %b
-; CHECK-NEXT: [[REM:%.*]] = urem i32 %a, %b
+; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[REM:%.*]] = urem i32 [[A]], [[B]]
; CHECK-NEXT: call void @foo(i32 [[REM]], i32 [[DIV]])
; CHECK-NEXT: ret void
;
@@ -34,14 +35,14 @@ define void @decompose_illegal_urem_same
define i32 @hoist_sdiv(i32 %a, i32 %b) {
; CHECK-LABEL: @hoist_sdiv(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
-; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, %b
+; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A]], [[B]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
@@ -63,14 +64,14 @@ end:
define i64 @hoist_udiv(i64 %a, i64 %b) {
; CHECK-LABEL: @hoist_udiv(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[REM:%.*]] = urem i64 %a, %b
-; CHECK-NEXT: [[DIV:%.*]] = udiv i64 %a, %b
+; CHECK-NEXT: [[REM:%.*]] = urem i64 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[DIV:%.*]] = udiv i64 [[A]], [[B]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[REM]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i64 [ [[DIV]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i64 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i64 [[RET]]
;
entry:
@@ -92,14 +93,14 @@ end:
define i16 @hoist_srem(i16 %a, i16 %b) {
; CHECK-LABEL: @hoist_srem(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[DIV:%.*]] = sdiv i16 %a, %b
-; CHECK-NEXT: [[REM:%.*]] = srem i16 %a, %b
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i16 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[REM:%.*]] = srem i16 [[A]], [[B]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[DIV]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i16 [ [[REM]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i16 [ [[REM]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i16 [[RET]]
;
entry:
@@ -121,14 +122,14 @@ end:
define i8 @hoist_urem(i8 %a, i8 %b) {
; CHECK-LABEL: @hoist_urem(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[DIV:%.*]] = udiv i8 %a, %b
-; CHECK-NEXT: [[REM:%.*]] = urem i8 %a, %b
+; CHECK-NEXT: [[DIV:%.*]] = udiv i8 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[REM:%.*]] = urem i8 [[A]], [[B]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[DIV]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i8 [ [[REM]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i8 [ [[REM]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i8 [[RET]]
;
entry:
@@ -152,20 +153,20 @@ define i32 @srem_of_srem_unexpanded(i32
; CHECK-NEXT: [[T0:%.*]] = mul nsw i32 [[Z:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[T1:%.*]] = sdiv i32 [[X:%.*]], [[T0]]
; CHECK-NEXT: [[T2:%.*]] = mul nsw i32 [[T0]], [[T1]]
-; CHECK-NEXT: [[T3_RECOMPOSED:%.*]] = srem i32 [[X]], [[T0]]
-; CHECK-NEXT: [[T4:%.*]] = sdiv i32 [[T3_RECOMPOSED]], [[Y]]
+; CHECK-NEXT: [[T3:%.*]] = srem i32 [[X]], [[T0]]
+; CHECK-NEXT: [[T4:%.*]] = sdiv i32 [[T3]], [[Y]]
; CHECK-NEXT: [[T5:%.*]] = mul nsw i32 [[T4]], [[Y]]
-; CHECK-NEXT: [[T6_RECOMPOSED:%.*]] = srem i32 [[T3_RECOMPOSED]], [[Y]]
-; CHECK-NEXT: ret i32 [[T6_RECOMPOSED]]
+; CHECK-NEXT: [[T6:%.*]] = srem i32 [[T3]], [[Y]]
+; CHECK-NEXT: ret i32 [[T6]]
;
%t0 = mul nsw i32 %Z, %Y
%t1 = sdiv i32 %X, %t0
%t2 = mul nsw i32 %t0, %t1
- %t3.recomposed = srem i32 %X, %t0
- %t4 = sdiv i32 %t3.recomposed, %Y
+ %t3 = srem i32 %X, %t0
+ %t4 = sdiv i32 %t3, %Y
%t5 = mul nsw i32 %t4, %Y
- %t6.recomposed = srem i32 %t3.recomposed, %Y
- ret i32 %t6.recomposed
+ %t6 = srem i32 %t3, %Y
+ ret i32 %t6
}
define i32 @srem_of_srem_expanded(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @srem_of_srem_expanded(
@@ -193,14 +194,14 @@ define i32 @srem_of_srem_expanded(i32 %X
define i32 @dont_hoist_udiv(i32 %a, i32 %b) {
; CHECK-LABEL: @dont_hoist_udiv(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
+; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[DIV:%.*]] = udiv i32 %a, %b
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
@@ -222,14 +223,14 @@ end:
define i32 @dont_hoist_srem(i32 %a, i32 %b) {
; CHECK-LABEL: @dont_hoist_srem(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[REM:%.*]] = urem i32 %a, %b
+; CHECK-NEXT: [[REM:%.*]] = urem i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[REM2:%.*]] = srem i32 %a, %b
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[REM2:%.*]] = srem i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[REM2]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[REM2]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
@@ -251,14 +252,14 @@ end:
define i32 @dont_hoist_sdiv(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @dont_hoist_sdiv(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
+; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, %c
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A]], [[C:%.*]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
@@ -280,15 +281,15 @@ end:
define i128 @dont_hoist_urem(i128 %a, i128 %b) {
; CHECK-LABEL: @dont_hoist_urem(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[DIV:%.*]] = udiv i128 %a, %b
+; CHECK-NEXT: [[DIV:%.*]] = udiv i128 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i128 [[DIV]], 42
-; CHECK-NEXT: br i1 [[CMP]], label %if, label %end
+; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[TMP0:%.*]] = mul i128 [[DIV]], %b
-; CHECK-NEXT: [[TMP1:%.*]] = sub i128 %a, [[TMP0]]
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[TMP0:%.*]] = mul i128 [[DIV]], [[B]]
+; CHECK-NEXT: [[TMP1:%.*]] = sub i128 [[A]], [[TMP0]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i128 [ [[TMP1]], %if ], [ 3, %entry ]
+; CHECK-NEXT: [[RET:%.*]] = phi i128 [ [[TMP1]], [[IF]] ], [ 3, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i128 [[RET]]
;
entry:
@@ -311,15 +312,15 @@ end:
define i32 @no_domination(i1 %cmp, i32 %a, i32 %b) {
; CHECK-LABEL: @no_domination(
; CHECK-NEXT: entry:
-; CHECK-NEXT: br i1 %cmp, label %if, label %else
+; CHECK-NEXT: br i1 [[CMP:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, %b
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: br label [[END:%.*]]
; CHECK: else:
-; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
-; CHECK-NEXT: br label %end
+; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A]], [[B]]
+; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], %if ], [ [[REM]], %else ]
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], [[IF]] ], [ [[REM]], [[ELSE]] ]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
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