[PATCH] D65505: [ARM] Reject CSEL instructions with invalid operands

[Mikhail Maltsev via Phabricator via llvm-commits]

miyuki created this revision.
miyuki added reviewers: momchil.velikov, dmgreen, ostannard, simon_tatham, t.p.northover.
Herald added subscribers: hiraditya, kristof.beyls, javed.absar.
Herald added a project: LLVM.

According to the Armv8.1-M manual CSEL, CSINC, CSINV and CSNEG are
"constrained unpredictable" when SP is used as the source register Rn.

The assembler should diagnose this case.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D65505

Files:
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/test/MC/ARM/thumbv8.1m.s
  llvm/test/MC/Disassembler/ARM/thumbv8.1m.s

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